Philips ISP1520 - page 6

Philips Semiconductors ISP1520

Hi-Speed USB hub controller

Product data Rev. 03 — 24 November 2004 6 of 51

9397 750 13701 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.

RREF 7 AI reference resistor connection; connect this pin through a

resistor of 12 kΩ±1 % to an analog band gap ground

reference

TEST_HIGH 8 - test pin; connect to 3.3 V

VCC1 9 - analog supply voltage 1 (3.3 V)

GND 10 - ground supply

VCC4 11 - cr ystal and PLL supply voltage4 (3.3 V)

TEST_HIGH 12 - test pin; connect to 3.3 V

VCC2 13 - transceiver supply voltage 2 (3.3 V)

GND 14 - ground supply

DM1 15 AI/O downstream facing port1 D− connection (analog)[3]

DP1 16 AI/O downstream facing port 1 D+ connection (analog)[3]

TEST_LOW 17 - connect to GND

TEST_HIGH 18 - connect to 5.0 V through a 10kΩ resistor

OC1_N 19 AI/I overcurrent sense input for downstream facing port1

(analog/digital)

PSW1_N 20 I/O output — power switch control output (open-drain) with an

internal pull-up resistor for downstream facing port 1

input — functionof the pin when used as an input is given in

Tabl e 5

GND 21 - ground supply

GND 22 - ground supply

VCC3 23 - digital supply voltage 3 (3.3 V)

VREF(5V0) 24 - reference voltage (5 V ±5 %); used to power internal pull-up

resistors of PSWn_N pins and also for the analog

overcurrent detection

OC4_N 25 AI/I overcurrent sense input for downstream facing port4

(analog/digital)

PSW4_N 26 I/O output — power switch control output (open-drain) with an

internal pull-up resistor for downstream facing port 4

input — functionof the pin when used as an input is given in

Tabl e 5

OC3_N 27 AI/I overcurrent sense input for downstream facing port3

(analog/digital)

PSW3_N 28 I/O output — power switch control output (open-drain) with an

internal pull-up resistor for downstream facing port 3

input — functionof the pin when used as an input is given in

Tabl e 5

OC2_N 29 AI/I overcurrent sense input for downstream facing port2

(analog/digital)

PSW2_N 30 I/O output — power switch control output (open-drain) with an

internal pull-up resistor for downstream facing port 2

input — functionof the pin when used as an input is given in

Tabl e 5

Table 2: Pin description[1]

…continued

Symbol[2] Pin Type Description

Contents

Main ISP1520 Hi-Speed Universal Serial Bus hub controller Universal Serial Bus Specication Rev.2.0 Rev. 03 24 November 2004 Product data 1. General description 2. Features Universal Serial Bus Specication Rev.2.0 3. Applications 4. Abbreviations 5. Ordering information Product data Rev. 03 24 November 2004 4 of 51 6. Block diagram Fig 1. Block diagram. ISP1520 Philips Semiconductors ISP1520 Product data Rev. 03 24 November 2004 5 of 51 7. Pinning information ISP1520BD Fig 2. Pin conguration. 7.2 Pin description 7.1 Pinning Page ISP1520 Hub Demo Board Users Guide Page 8. Functional description 8.3 Phase-locked loop clock multiplier 8.4 I2C-bus controller 8.5 Overcurrent detection circuit 8.6 GoodLink 8.7 Power-on reset Fig 4. External clock with respect to power-on reset. Fig 3. Power-on reset timing. Stable external clock is to be available at A. POR EXTERNAL CLOCK A 9. Conguration selections 9.1 Conguration through I/O pins Page Philips Semiconductors ISP1520 9.2 Device descriptors and string descriptors settings using I2C-bus The I C-bus specication Page 9.2.3 ROM or EEPROM map Page Page Philips Semiconductors ISP1520 Page 10. Hub controller description 11. Descriptors Page Page 12. Hub requests Tab le 23 shows the suppor ted standard USB requests. 12.1 Standard USB requests 12.2 Hub class requests Tab le 24 shows the hub class requests. 12.3 Detailed responses to hub requests Page Page 12.4 Various get descriptors bmRequestType 10000000B bmRequest GET_DESCRIPTOR = 6 13. Limiting values 14. Recommended operating conditions In accordance with the Absolute Maximum Rating System (IEC 60134). 15. Static characteristics Page Page 16. Dynamic characteristics C; test circuit Figure 21; unless otherwise specied. Page TPERIOD is the bit duration corresponding with the USB data rate. Fig 11. Source differential data-to-EOP transition skew and EOP width. TPERIOD is the bit duration corresponding with the USB data rate. tJR is the jitter reference point. Fig 13. Receiver SE0 width tolerance. Fig 12. Receiver differential data jitter. Fig 14. Hub differential data delay and SOP distortion. Fig 15. Hub EOP delay and EOP skew. and T within recommended operating range; V 5 V; V =V ; V 17. Application information 17.1 Descriptor conguration selection ISP1520 Fig 18. Adjusting analog overcurrent detection limit (optional). ISP1520 17.3 Self-powered hub congurations ISP1520 Fig 19. Self-powered hub; individual port power switching; individual overcurrent detection. Fig 20. Self-powered hub; ganged port power switching; global overcurrent detection. ISP1520 18. Test information DMn D Fig 22. Full-speed test circuit. Fig 21. High-speed transmitter and receiver test circuit. 19. Package outline LQFP64: plastic low profile quad flat package; 64 leads; body 10 x 10 x 1.4 mm SOT314-2 Fig 23. LQFP64 package outline. c 20. Soldering 20.1 Introduction to soldering surface mount packages Data Handbook IC26; Integrated Circuit Packages 20.2 Reow soldering 20.3 Wave soldering 21. Revision history Contact information 22. Data sheet status 23. Denitions 24. Disclaimers 25. Licenses 26. Trademarks Contents