Philips Semiconductors ISP1520
Hi-Speed USB hub controller
Product data Rev. 03 — 24 November 2004 41 of 51
9397 750 13701 © Koninklijke Philips Electronics N.V. 2004. All rights reserved.
[1] fSCL =1⁄64 ×fXTAL.
[2] Rise time is determined by Cb and pull-up resistor value Rp (typical 4.7 kΩ).
Table 46: Dynamic characteristics: I2C-bus (pins SDA and SCL)
V
CC
and T
amb
within recommended operating range; V
DD
=
5 V; V
SS
=V
GND
; V
IL
and V
IH
between V
SS
and V
DD
.
Symbol Parameter Conditions Min Ty p Max Unit
Clock frequency
fSCL SCL clock frequency fXTAL =12MHz [1] 0 93.75 100 kHz
General timing
tLOW SCL LOW time 4.7 - - µs
tHIGH SCL HIGH time 4.0 - - µs
trSCL and SDA rise time [2] - - 1000 ns
tfSCL and SDA fall time - - 300 ns
Cbcapacitive load for each bus line - - 400 pF
SDA timing
tBUF bus free time 4.7 - - µs
tSU;STA set-up time for (repeated) START
condition 4.7 - - µs
tHD;STA holdtime (repeated) START condition 4.0 - - µs
tSU;DAT data set-up time 250 - - ns
tHD;DAT data hold time 0 - - µs
tSU;STO set-up time for STOP condition 4.0 - - µs
Additional I2C-bus timing
tVD;DAT SCL LOW to data-out valid time - - 0.4 µs
Fig 16. I2C-bus timing.
PS Sr P
004aaa485
tHD;STA
tBUF
tSU;STA
tSU;DAT
tf
tHIGH tLOW tSU;STO
tr
tHD;DAT
SDA
SCL