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TDA5051A specifications
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DAT
A
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Product speciļ¬cation
Supersedes data of 1997
Sep
19
File under Integrated Circuits, IC11
1999 May 31
INTEGRATED CIRCUITS
TDA5051A
Home automation modem
Contents
Main
Page
1999 May 31 3
ORDERING INFORMATION
Fig.1 Block diagram.
BLOCK DIAGRAM
Page
Home automation modem TDA5051A
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Page
Page
1999 May 31 9
Fig.4 Shaped signal spectrum.
Fig.5 AGC time constant definition (not to scale).
1999 May 31 10
TIMING Conguration for clock
TDA5051A
Fig.7 Typical configuration for on-chip clock circuit.
Fig.6 External clock.
Page
Page
1999 May 31 13
Timing diagrams
Fig.11 Timing diagram during power-up in reception mode.
Fig.10 Timing diagram during power-up in transmission mode.
1999 May 31 14
Fig.12 Power-down sequence in transmission mode.
Fig.14 Power saving by dynamic control of power-down.
Fig.13 Power-down sequence in reception mode.
1999 May 31 15
TEST INFORMATION
Fig.15 Test set-up for measuring demodulation delay.
1999 May 31 16
Fig.16 Test set-up for measuring THD and bandwidth of the TXOUT signal.
1999 May 31 17
TDA5051A
Fig.17 Test set-up for measuring Bit Error Rate (BER).
1999 May 31 18
APPLICATION INFORMATION
Fig.18 Application diagram without power line insulation.
1999 May 31 19
1999 May 31 20
Fig.21 Application diagram with power line insulation.
1999 May 31 21
Fig.22 Application diagram without power line insulation, with improved sensitivity (68 dBV typ.).
1999 May 31 22
Fig.23 Application diagram with power line insulation, with improved sensitivity (68 dBV typ.).
1999 May 31 23
PACKAGE OUTLINE
SO16: plastic small outline package; 16 leads; body width 7.5 mm SOT162-1
Data Handbook IC26; Integrated Circuit Packages
Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods
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Philips Semiconductors a worldwide company
Printed in The Netherlands