Philips Semiconductors TDA9964
12-bit, 3.0 V, 30 Msps analog-to-digital interface for CCD cameras
Objective specification Rev. 03 — 16 January 2001 15 of 23
9397 750 07918 © Philips Electronics N.V. 2001. All rights reserved.
11. Application information

Table 12: Output enable control by serial interface (register addressA3 =0, A2 =0,

A1 = 1 and A0 = 1); output enable pin (OE) connected to ground

SD6 ADC digital outputs D11 to D0

0 high impedance

1 active binary

(1) Pins SEN and VSYNC should be interconnected when the vertical sync signal is not available.

(2) Input signals IN, SHD and SHP must be adjusted to comply with timing signals th(IN;SHP) and th(IN;SHD) (see Section 10

“Characteristics”).

Fig 11. Application diagram.

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FCE525
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TDA9964
D11
D10
D9
D8
D6
D5
D4
D3
D2
VCCO
VCCA1
VCCA2
AGND1
AGND2
IN
AGND3
CPCDS1
OFDOUT
TEST
D7
SHP
SHD
CLPOB
BLK
VCCA4
AGND6
STDBY
CLPDM
OGND2
OE
VCCO2
CLK
CPCDS2
DCLPC
AGND5
VCCA3
VCCD1
VCCO1
SCLK
SEN
VSYNC
OPGA
OPGAC
SDATA
AGND4
DGND1
OGND1
serial
interface
VCCA
VCCA
CCD(2)
VCCA VCCO
100 nF
100 nF
100
nF
VCCD
100 nF
VCCA
100 nF
VCCD
100 nF
1 µF
1
µF
1
µF
1
µF
(1)
(2) (2)
D0
D1
VCCD