TABLE
|
|
|
|
| Bit |
|
|
|
Byte | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 |
|
|
| Operation Code (AFh) |
|
|
| |
1 |
| Logical Unit No. |
|
| Reserved | 0 | 0 | 0 |
2 |
|
|
| Logical block address (MSB) |
|
|
| |
3 |
|
|
| Logical block address |
|
|
| |
4 |
|
|
| Logical block address |
|
|
| |
5 |
|
|
| Logical block address (LSB) |
|
|
| |
6 |
|
|
| Verification Length (MSB) |
|
|
| |
7 |
|
|
| Verification Length |
|
|
| |
8 |
|
|
| Verification Length |
|
|
| |
9 |
|
|
| Verification Length (LSB) |
|
|
| |
10 |
|
|
|
| Reserved |
|
|
|
11 |
|
|
|
| Reserved |
|
|
|
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