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4 Address Map and Special Registers
This chapter explains how the two UARTs and special registers are addressed, as well as the layout of those registers. This material will be of interest to programmers writing driver software for the
4.1 Base Address and Interrupt Level (IRQ)
The base address and IRQ used by the
Channel | I/O Address Range | ||
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Port 1 | Base Address + 0 | to | Base Address + 7 |
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Port 2 | Base Address + 8 | to | Base Address + 15 |
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Figure 7 --- Port Address Map
All two serial ports share the same IRQ. The DSC-200/300 signals a hardware interrupt when any port requires service. The interrupt signal is maintained until no port requires service. Interrupts are level-sensitive on the PCI bus.
The base address and IRQ are automatically detected by the device drivers Quatech supplies for various operating systems. For cases where no device driver is available, such as for operation under DOS, Quatech supplies the "QTPCI" DOS software utility for manually determining the resources used. See page 17 for details.
Quatech | 14 |