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Example 3: Write data into the transmit buffer of channel A.
mov | dx,base | ; load base address |
out | dx,al | ; write data in ax to buffer |
Example 4: Read data from the receive buffer of channel A.
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| mov | dx,base | ; load base address |
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| in | al,dx | ; write data in ax to buffer |
Table 2 | SCC read register description. |
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RR0 |
| Transmit, Receive buffer statuses and external status | ||
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RR1 |
| Special Receive Condition status, residue codes, error conditions | ||
RR2 |
| Modified Channel B interrupt vector and Unmodified Channel A | ||
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| interrupt vector |
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RR3 |
| Interrupt Pending bits |
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RR6 |
| LSB of frame byte count register | ||
RR7 |
| MSB of frame byte count and FIFO status register | ||
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RR8 |
| Receive buffer |
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RR10 |
| Miscellaneous status parameters | ||
RR12 |
| Lower byte of baud rate time constant | ||
RR13 |
| Upper byte of baud rate time constant | ||
RR15 |
| External/Status interrupt information | ||
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The SCC can perform three basic forms of I/O operations: polling, interrupts, and block transfer. Polling transfers data, without interrupts, by reading the status of RR0 and then reading or writing data to the SCC buffers via CPU port accesses. Interrupts on the SCC can be sourced from the receiver, the transmitter, or External/Status conditions. At the event of an interrupt, Status can be determined, then data can be written to or read from the SCC via CPU port accesses. For block transfer mode, DMA transfers accomplish data transfers from the SCC to memory or from memory to the SCC, interrupting the CPU only when the Block is finished. Further information on these subjects are found in the chapters titled INTERRUPTS, and DIRECT MEMORY ACCESS.
The SCC incorporates additional circuitry supporting serial communications. This circuitry includes clocking options, baud rate generator (BRG), data encoding, and internal loopback. The SCC may be programmed to select one of several sources to provide the transmit and receive clocks. These clocks can be programmed in WR11 to come from the RTXC pin, the TRXC pin, the output of the BRG, or the transmit output of the DPLL. The
7 | Quatech Inc., |