![](/images/new-backgrounds/1174826/17482665x1.webp)
10.2 DCE Configuration
On the
The control signals that the DCE can generate are the Clear to Send (CTS), Carrier Detect (CD), and Data Set Ready (DSR). It can receive the signals Data Terminal Ready (DTR) and Ready to Send (RTS). All of the control signals are controlled through channel A of the SCC, with the exception of the CD signal, which is generated on channel B.
Depending on the value of TCKEN (D2 of the communications register) the DCE’s transmit clock (TCLK from the SCC ‘s TRXCA pin) can either be trans- mitted on TTCLK, or not used at all because the DCE can not receive a TCLK. Depending on the value of RCKEN (D3 of the communications register), the DCE’s receive clock (RCLK from the SCC’s RTXC pins) can either be received on RRCLK or generated on TRXCB of the SCC. In this second case, the signal from TRXCB is also transmitted on RTCLK. Figure 5 illustrates the clock circuitry of the
27 | Quatech Inc., |