MII/RMII 10/100 Ethernet Transceiver with HP
Datasheet
Table 3.2 MII/RMII Signals (continued)
SIGNAL |
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NAME | PIN # | TYPE | DESCRIPTION |
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TXD2 | 24 | I8 | Transmit Data 2: The MAC transmits data to the transceiver using this |
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| signal in MII Mode. |
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| This signal should be grounded in RMII Mode. |
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TXD3 | 25 | I8 | Transmit Data 3: The MAC transmits data to the transceiver using this |
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| signal in MII Mode. |
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| This signal should be grounded in RMII Mode. |
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nINT/ | 18 | IOPU | nINT – Active low interrupt output. Place an external resistor |
TXER/ |
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| VDDIO. |
TXD4 |
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| See Section 4.10 for information on how nINTSEL is used to determine |
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| the function for this pin. |
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| TXER – MII Transmit Error: When driven high, the 4B/5B encode process |
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| substitutes the Transmit Error |
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| This input is ignored in |
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| TXD4 – MII Transmit Data 4: In Symbol Interface (5B Decoding) mode, this |
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| signal becomes the MII Transmit Data 4 line, the MSB of the |
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| TXD4 is not used in RMII Mode. |
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| This signal is mux’d with nINT |
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TXEN | 21 | IPD | Transmit Enable: Indicates that valid data is presented on the TXD[3:0] |
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| signals, for transmission. In RMII Mode, only TXD[1:0] have valid data. |
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TXCLK | 20 | O8 | Transmit Clock: Used to latch data from the MAC into the transceiver. |
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| MII (100BT): 25MHz |
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| MII (10BT): 2.5MHz |
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| This signal is not used in RMII Mode. |
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RXD0/ | 11 | IOPU | RXD0 – Receive Data 0: Bit 0 of the 4 data bits that are sent by the |
MODE0 |
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| transceiver in the receive path. |
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| MODE0 – PHY Operating Mode Bit 0: set the default MODE of the PHY. |
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| See Section 5.3.9.2 for information on the MODE options. |
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RXD1/ | 10 | IOPU | RXD1 – Receive Data 1: Bit 1 of the 4 data bits that are sent by the PHY |
MODE1 |
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| in the receive path. |
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| MODE1 – PHY Operating Mode Bit 1: set the default MODE of the PHY. |
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| See Section 5.3.9.2 for information on the MODE options. |
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RXD2/ | 9 | IOPD | RXD2 – Receive Data 2: Bit 2 of the 4 data bits that are sent by the |
RMIISEL |
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| transceiver in the receive path. |
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| The RXD2 signal is not used in RMII Mode. |
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| RMIISEL – MII/RMII Mode Selection: Latched on the rising edge of the |
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| internal reset (nRESET) based on the following strapping: |
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| By default, MII mode is selected. |
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| Pull this pin high to VDDIO with an external resistor to select RMII mode, |
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RXD3/ | 8 | IOPD | RXD3 – Receive Data 3: Bit 3 of the 4 data bits that are sent by the |
PHYAD2 |
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| transceiver in the receive path. |
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| This signal is not used in RMII Mode. |
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| This signal is mux’d with PHYAD2 |
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| PHYAD2 – PHY Address Bit 2: set the SMI address of the transceiver. |
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| See Section 5.3.9.1 for information on the ADDRESS options. |
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SMSC LAN8710/LAN8710i | 15 | Revision 1.0 |
| DATASHEET |
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