Sony MDS-JE640 specifications IC1 M30805SGP System Control Main Board

• IC1 M30805SGP SYSTEM CONTROL (MAIN BOARD)

Pin No.	Pin Name	I/O	Function
1	DATA(FL)	O	Serial data signal output to the display driver.
2	CLK(FL)	O	Serial clock signal output to the display driver. L: Active
3	A1-IN	I	A1 Control input. (Fixed at L)
4	SIRCS	I	Remote control input.
5 to 7	NC	—	Not used.
8	MUTE	O	Line out muting output. L: Mute
9	AD/DA RESET	O	Reset signal output to the AK4524. L: Active
10	AD/DA LATCH	O	Latch signal output to the AK4524. L: Active
11	LD-LOW	O	Loading motor voltage control output L: High voltage H: Low voltage
12	LDIN	I	Loading motor control input. H: IN
13	LDOUT	O	Loading motor control output. H: OUT
14	MOD	O	Laser modulation switching signal output. L: OFF H: ON
15	BYTE	I	Data bus changed input. (Connected to ground.)
16	CNVSS	—	Ground.
17	XIN-T	O	Not used .
18	XOUT-T	O	Not used .
19	RESET	I	System rest input. L : ON
20	XOUT	O	Main clock output. (10MHz)
21	VSS	—	Ground.
22	XIN	I	Main clock input. (10MHz)
23	VCC	—	Power supply. (+3.3V)
24	NMI	I	Fixed at H. (Pull-up)
25	DQSY	I	Digital in sync input. (Record system)
26	P.DOWN	I	Power down detection input. L: Power down
27	SQSY	I	ADIP (MO) sync or subcode Q (PIT) sync input from CXD2662R.(Playback system)
28	K.B-CLK	I	Keyboard clock input.
29	LDON	O	Laser ON/OFF control output. H: Laser ON
30	LIMIT-IN	I	Detection input from the limit switch. L: Sled limit-In H: Sled limit-Out
31	A1 OUT	O	A1 Control output.
32	XINIT	I	Interrupt status input from CXD2662R.
33	BEEP	O	Beep output.
34	LRCKI	I	LR clock input.
35	WR PWR	O	Write power ON/OFF output. L: OFF H: ON
36	IIC CLK	I/O	IIC serial clock input/output.
37	IIC DATA	I/O	IIC serial data input/output.
38	SWDT	O	Writing data signal output to the serial bus.
39	VCC	—	Power supply. (+3.3V)
40	SRDT	I	Reading data signal input from the serial bus.
41	VSS	—	Ground.
42	SCLK	O	Clock signal output to the serial bus.
43	REC-SW	I	Detection signal input from the recording position detection switch. L: REC
44	CLIP DATA	O	CLIP serial data output.
45	RX0(CLIP)	I	CLIP serial data input.
46	CLIP CLK	O	CLIP serial clock output.
47	DIG-RST	O	Digital rest signal output to the CXD2662R and motor driver. L: Reset
48	SENS	I	Internal status (SENSE) input from the CXD2662R.
49	PLAY-SW	I	Detection signal input from the playback position detection switch. L: PLAY
50	XLATCH	O	Latch signal output to the serial bus.
51	OUT-SW	I	Detection signal input from the loading out detection switch.
52	RDY	I	Fixed at H. (Pull-up)
53	ALE/RAS	O	Microprocessor mode output. (Not used.)
54	HOLD	I	Fixed at H. (Pull-up)

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