Texas Instruments manual 4. APA100 Integrator Design

Feedback System Design

Figure 4−3. Open− and Closed−Loop Frequency Response With TPA2001D1 Pole and Canceling Zero

Open Loop Gain	F P0
	X

20 dB / Decade

Gain − dB

Closed Loop Gain

			Fc = 40 kHz	X
	FP0			XX
			80 kHz
0 Degrees		10
				>400 kHz

Phase

FP0* 10

−90 Degrees

Frequency − Hz

Now that the poles and zeros have been realized, the closed−loop gain can be set. First, calculate the open−loop gain by multiplying the gain (adding in dB) of each block, if there was no feedback. The integrator block adds gain of the feedback impedance/input resistor at the given frequency. The feedback impedance is the impedance of C24 + R25 (C21 is overlooked because it has a large enough impedance to be considered open).

Gain of integrator = ZC24 + R25/R18 (ZC24 = 1/(2π x C24 x f))

The TPA2001D1 has a gain set to 18 dB. The TAS5111 converts the 3-V PWM to the A+ rail (18 V to 29.5 V). The open−loop gain from the T AS5111 can range from 18 V/3 V = 6 V/V to 29.5 V/3 V = 9.8 V/V (17 dB to 29 dB). Adding the gains of each stage in dB:

Open−loop gain = Integrator gain + 18 dB + 17 dB to 20 dB.

Figure 4−4. APA100 Integrator Design

	R20
	R21
	C21
	R24
	C25
R18
Input	_
Amplifier
MID	+

− 33 dB

Differential to Single-

Ended Converter

TPA2001D1

+

TAS5111

35 dB

Audio Output

4-4