Texas Instruments DEM-DAI3793A Power Up/Down Time (ms) Options

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Power Up/Down Time (ms) Options

Power Up/Down Time (ms) Options

It is possible to select the V

COM

ramp up/down time from GND level to a common voltage level orvice-versa by choosing a V

COM

capacitor value and time by choosing one of the available checkboxes. A4.7 μF V

COM

capacitor is chosen as the default setting (this capacitor is also mounted on the EVM).

The 4.7 μF V

COM

capacitor is the recommended value for operating the EVM. This configuration is therecommended power-on sequence discussed in the product data sheet .

To select a different V

COM

value, choose the appropriate value from the V

COM

capacitor drop-down menu.Be sure to change the capacitor on the EVM to the same value (1.0 μF, 2.2 μF or 10 μF).

The combination of PTM[1:0] and RES[4:0] determines the V

COM

ramp up/down time, as described inTable 3-2 and Table 3-3 .

To set the ramp up or down time without directly accessing the registers, users can select a V

COMcapacitor value and time in the group box. The ramp up waveform with the default setting is shown inFigure 3-5 , and the ramp down waveform in Figure 3-6 , as references.

Table 3-2. PCM3793A/94A Resistor 125(7dh)RES[4:0]: Resistor Value Control

RES [4:0] V

COM

Resistor Value

10000 60 k Ω

11000 24 k Ω

11100 12 k Ω

11110 6 k Ω

Others Reserved

Table 3-3. PCM3793A/94A Resistor 125(7dh) PMT[1:0]: Power Up/Down Time Control andRegister Direct Access

V

COM

Capacitor Power-Up Time Power-Down Time Register Direct[μF] RES[4:0] PTM[1:0] [ms] [ms] Access

10 11110 00 450 750 0x7D1E

11100 11 900 1500 0x7D7C

11000 Do not set — — —

10000 Do not set — — —

4.7 11110 01 250 400 0x7D3E

11100 00 450 750 0x7D1C (default)

11000 11 900 1500 0x7D78

10000 Do not set — — —

2.2 11110 10 100 300 0x7D5E

11100 01 250 400 0x7D3C

11000 00 450 750 0x7D18

10000 11 900 1500 0x7D70

1.0 11110 Do not set — — —

11100 10 100 300 0x7D5C

11000 01 250 400 0x7D38

10000 00 450 750 0x7D10

SBAU127 – July 2007 Set-Up Guide 25Submit Documentation Feedback

Contents

Main Page Contents Page Page Page Page Page Preface Read This First Page Chapter 1 Description 1.1 IntroductionPCM3793A/94A 1.1.1 Key Features Page 1.2 Pin Assignments and Terminal Functions Pin Assignments and Terminal Functions 1.3 DEM-DAI3793A/3794A EVM Description DEM-DAI3793A/3794A EVM Description Table 1-1. PCM3793A/94A Terminal Functions (continued) Figure 1-3. DEM-DAI3793A/3794A EVM System Diagram Page Chapter 2 Getting Started Page Page Page Chapter 3 Set-Up Guide Page 3.2.2 Power On/Off Sequence 3.2.3 Module Function Controls Page Power Up/Down Time (ms) Options Page Gain Control for ADC Input Options Figure 3-8 shows the EVM modules that correspond to the record function. SBAU127 July 2007 Set-Up Guide 27Submit Documentation Feedback Figure 3-8. EVM Modules Corresponding to Record Function Gain Control for ADC Input Options Digital Mute (ATR) Options Digital Out Mute Control Options Page Headphone Gain Control Options Figure 3-10 shows the corresponding modules for the playback function. SBAU127 July 2007 Set-Up Guide 29Submit Documentation Feedback Figure 3-10. Modules Corresponding to Playback Function Headphone Gain Control Options Speaker Gain Control Options Digital Attenuation (ATP) Options Auto Level Control (Record) Options Source Options Output Options Tone Control Options 3D Effect Options Notch Filter 1 Coefficient, Notch Filter 2 Coefficient Options Page DAC Oversampling Control Options Zero Cross Control Options De-Emphasis Filter Options High-Pass Filter Options Page Analog Input Options Figure 3-19 illustrates the modules that correspond to the analog path function. Set-Up Guide36 SBAU127 July 2007Submit Documentation Feedback Figure 3-19. Modules Corresponding to Analog Path Function Analog Input Options D2S Select Options Analog Mixer Options Mic Boost Options This checkbox sets (or resets) the +20dB microphone pre-amp PG1 (L-ch) or PG2 (R-ch). Page Page 3.2.4 LC89052T (DIR: Digital Audio I/F Receiver) Control Window Page Page 3.2.6 Register Direct Access Chapter 4 Switches and Connectors 4.1 Overview 4.2 Motherboard Motherboard Table 4-3. Audio I/O Table 4-4. I/F Controller (MSP430 ,TUSB3410 ) 4.3 Daughter Card #1 (PCM3793A) Daughter Card #1 (PCM3793A) Figure 4-2. Analog Input Configuration (Daughter Card #1) HPOR/LOR HPOL/LOL Daughter Card #1 (PCM3793A) SBAU127 July 2007 Switches and Connectors 47Submit Documentation Feedback 4.4 Daughter Card #2 (DIR: LC89052T and DIT: DIT4096) Daughter Card #2 (DIR: LC89052T and DIT: DIT4096) Chapter 5 Evaluation and Measurements 5.1 Slave Mode With Audio Precision SYS-2722 (Default Setting) Slave Mode With Audio Precision SYS-2722 (Default Setting) Slave Mode With Audio Precision SYS-2722 (Default Setting) Figure 5-2. Jumper Configuration for Slave Mode (Default) 5.2 Master Mode with Audio Precision SYS-2722 Master Mode with Audio Precision SYS-2722 Figure 5-4. Jumper Configuration for Master Mode 5.3 Combined Master and Slave Modes With PSIA-2722 ADC AudioInterface Combined Master and Slave Modes With PSIA-2722 5.4 Measurements for Dynamic Characteristics 5.4.1 Digital-to-Analog (D/A) Performance 5.4.2 Analog-to-Digital (A/D) Performance 5.4.3 Speaker Output Power Performance 5.4.3.1 LC Low-Pass Filter Figure 5-7. Speaker Output Filter Configuration 5.4.4 Amplitude Versus Frequency Performance 5.4.4.1 A/D Spectrum 5.4.4.2 D/A Spectrum 5.5 Connection Diagram for Practical Applications PCM3793A/94A Connection Diagram for Practical Applications 5.5.1 Filter Consideration for Speaker Output + + 62 Evaluation and Measurements SBAU127 July 2007Submit Documentation Feedback Connection Diagram for Practical Applications Refer to the product data sheet for further information on this application circuit. C Schematic, PCB Layout, and Bill of Materials Page Page Page Page Page Page Page 6.3 Component List Component List SBAU127 July 2007 Schematic, PCB Layout, and Bill of Materials 71Submit Documentation Feedback Table 6-1 lists the Bill of Materials for the DEM-DAI3793A/3794A EVM. Table 6-1. Bill of Materials Page Page A.1 Reference .csv Files A Related Signal Flow Diagrams Figure A-1. Line Output and Headphone Output Figure A-2. Headphone Output with Sound Effect Figure A-3. Cap-Less Headphone Output Figure A-4. Headphone Output with Line Input (AIN2L/AIN2R) Figure A-5. Headphone Output with Mono Mic Input (AIN1L, +20dB) Figure A-6. Headphone Output with Mono Diff Mic Input (AIN1L/AIN1R, +20dB) Figure A-7. Stereo Speaker Output Figure A-8. Mono Speaker Output Figure A-9. Speaker Output with Line Input (AIN2L/AIN2R) Figure A-10. Speaker Output with Mono Mic Input (AIN1L, +20dB) Figure A-11. Speaker Output with Mono Diff Mic Input (AIN1L/AIN1R, +20dB) Figure A-12. Line Input (AIN2L/AIN2R) to Headphone Output Figure A-13. Mono Line Input (AIN2L) to Headphone Output Figure A-14. Mono Mic Input (AIN1L, +20dB) to Headphone Output Figure A-15. Mono Diff Mic Input (AIN1L/AIN1R, +20dB) to Headphone Output Figure A-16. Mono Mic Input (AIN1L, +20dB) to Speaker Output Figure A-17. Line Input (AIN3L/AIN3R) Figure A-18. Mic Input (AIN1L/AIN1R, +20dB) Figure A-19. Mic Input (AIN1L/AIN1R, +20dB) with ALC Figure A-20. Mono Mic Input (AIN1L, +20dB) Figure A-21. Mono Mic Input (AIN1L, +20dB) with ALC Figure A-22. Mono Diff Mic Input (AIN1L/AIN1R, +20dB) Figure A-23. Mono Diff Mic Input (AIN1L/AIN1R, +20dB) with ALC A.2 Interfacing to DSPs A.2.1 Register Control with DSP Interface A.3 Package Information Package Information Page IMPORTANT NOTICE