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Texas Instruments DEM-DAI3793A 4.4 Daughter Card #2 (DIR: LC89052T and DIT: DIT4096)

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4.4 Daughter Card #2 (DIR: LC89052T and DIT: DIT4096)

Daughter Card #2 (DIR: LC89052T and DIT: DIT4096)

Table 4-6 lists the connector references for the second DEM-DAI3793A/3794A EVM daughter card.

Table 4-6. Analog Input and Output—Daughter Card #2

Connectors Analog Input and Output of Daughter Card #2

SW001 Toggle switch. Opt/Coax selector for S/PDIF input

SW002 Toggle switch. Reset/Power-down LC89052T and DIT4096

SW003 Clock source selection for LC89052T (Onboard crystal oscillator orexternal source from CN306 of motherboard)

SW004 DIP switch. Sets channel-status data of the DIT4096

(1)

. Note that theOFF state of this switch sets a HIGH level. Channel-status data canbe set up if needed. It is also possible to connect a microcontroller.

SW005 DIP switch. Sets the DIT4096 system clock and data format. Notethat the OFF state of this switch sets a HIGH level.

(1)

See the DIT4096 product data sheet (TI literature number SBOS225 , available for download fromthe TI web site ) for further information.

Table 4-7 describes the audio clock and data control format options for Daughter Card #2.

Table 4-7. Audio Clock and Input Data ControlFormat—Daughter Card #2

CLK0 CLK1 System Clock

L L Not used

L H 256f

S

(initial setting)

H L 384f

S

H H 512f

S

FMT0 FMT1 Input Data Format

L L 24-bit, left-justified, MSB-first

L H 24-bit, I

2

S (initial setting)

H L 24-bit, right-justified, MSB-first

H H 16-bit, right-justified, MSB-first

Switches and Connectors48 SBAU127 – July 2007Submit Documentation Feedback

Contents

Main Page Contents Page Page Page Page Page Preface Read This First Page Chapter 1 Description 1.1 IntroductionPCM3793A/94A 1.1.1 Key Features Page 1.2 Pin Assignments and Terminal Functions Pin Assignments and Terminal Functions 1.3 DEM-DAI3793A/3794A EVM Description DEM-DAI3793A/3794A EVM Description Table 1-1. PCM3793A/94A Terminal Functions (continued) Figure 1-3. DEM-DAI3793A/3794A EVM System Diagram Page Chapter 2 Getting Started Page Page Page Chapter 3 Set-Up Guide Page 3.2.2 Power On/Off Sequence 3.2.3 Module Function Controls Page Power Up/Down Time (ms) Options Page Gain Control for ADC Input Options Figure 3-8 shows the EVM modules that correspond to the record function. SBAU127 July 2007 Set-Up Guide 27Submit Documentation Feedback Figure 3-8. EVM Modules Corresponding to Record Function Gain Control for ADC Input Options Digital Mute (ATR) Options Digital Out Mute Control Options Page Headphone Gain Control Options Figure 3-10 shows the corresponding modules for the playback function. SBAU127 July 2007 Set-Up Guide 29Submit Documentation Feedback Figure 3-10. Modules Corresponding to Playback Function Headphone Gain Control Options Speaker Gain Control Options Digital Attenuation (ATP) Options Auto Level Control (Record) Options Source Options Output Options Tone Control Options 3D Effect Options Notch Filter 1 Coefficient, Notch Filter 2 Coefficient Options Page DAC Oversampling Control Options Zero Cross Control Options De-Emphasis Filter Options High-Pass Filter Options Page Analog Input Options Figure 3-19 illustrates the modules that correspond to the analog path function. Set-Up Guide36 SBAU127 July 2007Submit Documentation Feedback Figure 3-19. Modules Corresponding to Analog Path Function Analog Input Options D2S Select Options Analog Mixer Options Mic Boost Options This checkbox sets (or resets) the +20dB microphone pre-amp PG1 (L-ch) or PG2 (R-ch). Page Page 3.2.4 LC89052T (DIR: Digital Audio I/F Receiver) Control Window Page Page 3.2.6 Register Direct Access Chapter 4 Switches and Connectors 4.1 Overview 4.2 Motherboard Motherboard Table 4-3. Audio I/O Table 4-4. I/F Controller (MSP430 ,TUSB3410 ) 4.3 Daughter Card #1 (PCM3793A) Daughter Card #1 (PCM3793A) Figure 4-2. Analog Input Configuration (Daughter Card #1) HPOR/LOR HPOL/LOL Daughter Card #1 (PCM3793A) SBAU127 July 2007 Switches and Connectors 47Submit Documentation Feedback 4.4 Daughter Card #2 (DIR: LC89052T and DIT: DIT4096) Daughter Card #2 (DIR: LC89052T and DIT: DIT4096) Chapter 5 Evaluation and Measurements 5.1 Slave Mode With Audio Precision SYS-2722 (Default Setting) Slave Mode With Audio Precision SYS-2722 (Default Setting) Slave Mode With Audio Precision SYS-2722 (Default Setting) Figure 5-2. Jumper Configuration for Slave Mode (Default) 5.2 Master Mode with Audio Precision SYS-2722 Master Mode with Audio Precision SYS-2722 Figure 5-4. Jumper Configuration for Master Mode 5.3 Combined Master and Slave Modes With PSIA-2722 ADC AudioInterface Combined Master and Slave Modes With PSIA-2722 5.4 Measurements for Dynamic Characteristics 5.4.1 Digital-to-Analog (D/A) Performance 5.4.2 Analog-to-Digital (A/D) Performance 5.4.3 Speaker Output Power Performance 5.4.3.1 LC Low-Pass Filter Figure 5-7. Speaker Output Filter Configuration 5.4.4 Amplitude Versus Frequency Performance 5.4.4.1 A/D Spectrum 5.4.4.2 D/A Spectrum 5.5 Connection Diagram for Practical Applications PCM3793A/94A Connection Diagram for Practical Applications 5.5.1 Filter Consideration for Speaker Output + + 62 Evaluation and Measurements SBAU127 July 2007Submit Documentation Feedback Connection Diagram for Practical Applications Refer to the product data sheet for further information on this application circuit. C Schematic, PCB Layout, and Bill of Materials Page Page Page Page Page Page Page 6.3 Component List Component List SBAU127 July 2007 Schematic, PCB Layout, and Bill of Materials 71Submit Documentation Feedback Table 6-1 lists the Bill of Materials for the DEM-DAI3793A/3794A EVM. Table 6-1. Bill of Materials Page Page A.1 Reference .csv Files A Related Signal Flow Diagrams Figure A-1. Line Output and Headphone Output Figure A-2. Headphone Output with Sound Effect Figure A-3. Cap-Less Headphone Output Figure A-4. Headphone Output with Line Input (AIN2L/AIN2R) Figure A-5. Headphone Output with Mono Mic Input (AIN1L, +20dB) Figure A-6. Headphone Output with Mono Diff Mic Input (AIN1L/AIN1R, +20dB) Figure A-7. Stereo Speaker Output Figure A-8. Mono Speaker Output Figure A-9. Speaker Output with Line Input (AIN2L/AIN2R) Figure A-10. Speaker Output with Mono Mic Input (AIN1L, +20dB) Figure A-11. Speaker Output with Mono Diff Mic Input (AIN1L/AIN1R, +20dB) Figure A-12. Line Input (AIN2L/AIN2R) to Headphone Output Figure A-13. Mono Line Input (AIN2L) to Headphone Output Figure A-14. Mono Mic Input (AIN1L, +20dB) to Headphone Output Figure A-15. Mono Diff Mic Input (AIN1L/AIN1R, +20dB) to Headphone Output Figure A-16. Mono Mic Input (AIN1L, +20dB) to Speaker Output Figure A-17. Line Input (AIN3L/AIN3R) Figure A-18. Mic Input (AIN1L/AIN1R, +20dB) Figure A-19. Mic Input (AIN1L/AIN1R, +20dB) with ALC Figure A-20. Mono Mic Input (AIN1L, +20dB) Figure A-21. Mono Mic Input (AIN1L, +20dB) with ALC Figure A-22. Mono Diff Mic Input (AIN1L/AIN1R, +20dB) Figure A-23. Mono Diff Mic Input (AIN1L/AIN1R, +20dB) with ALC A.2 Interfacing to DSPs A.2.1 Register Control with DSP Interface A.3 Package Information Package Information Page IMPORTANT NOTICE