Tyan Computer B5102, GX21 Active to Precharge Delay, 8 / 7 / 6, DRAM RAS# to CAS# Delay, 4 / 3

Active to Precharge Delay

This setting is the number of clock cycles needed after a bank active command before a precharge can occur. The possible values are:

8 / 7 / 6 / 5

DRAM RAS# to CAS# Delay

This setting is the number of cycles from when a bank acti- vate command is issued until a read or write command is accepted, that is, before the CAS becomes active. The possi- ble values are:

4 / 3 / 2

DRAM RAS# Precharge

This setting is the number of cycles needed to return data to its original location to close the bank or number of cycles to page memory before the next bank activate command can be issued. The possible values are:

4 / 3 / 2

System BIOS Cacheable

Enabling this option will cause the BIOS code from ROM to be copied on to the much faster RAM at location F0000h- FFFFFh, thus increasing system performance. However, if any program writes to this memory area, a system error may result. The choices are:

Disabled / Enabled

VIDEO BIOS Cacheable

Enabling this option will cause the VIDEO BIOS code from the video adapter’s ROM to be copied on to the much faster RAM, thus increasing system performance. However, if any program writes to this memory area, a system error may result. The choices are:

Disabled / Enabled

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