Xilinx XAPP169

MP3 NG: A Next Generation Consumer Platform

XAPP169 (v1.0) November 24, 1999 www.xilinx.com 5

1-800-255-7778

The RC32364 interfaces to the system through a 32-bit multiplexed ad dress/data bus. The bus

offers a rich set of signals to control transfers of which only a subset was required for this

application. Figure 4 shows the timing for read transactions on this bus.

MasterClock

AD(31:0) Addr

Data Input

Addr(3:2)

ALE

DataEn*

Ack*

Last*

Rd*

CIP*

I/D*

DT/R*

Wr*

Addr

Data Input

Width(1:0)

Figure 4: RC32364 Read Timing

(Courtesy IDT)

Contents

Main Summary Introduction MP3 Background MP3 NG: A Next Generation Consumer Platform MP3 Technology Solution Overview IDT RC32364 RISController 4www.xilinx.com XAPP169 (v1.0) November 24, 1999 24 8 VPN Offset Enhanced JTAG (ICE Interface) Figure 2: RC32364 Block Diagram ( 28 11 0 20 12 Page Crystal CS4343 Stereo DAC MP3 NG: A Next Generation Consumer Platform XAPP169 (v1.0) November 24, 1999 www.xilinx.com 7 1-800-255-7778 Figure 6: Control Port Timing (Courtesy Cirrus Logic) Figure 7: Serial Port Timing (Courtesy Cirrus Logic) Samsung FLASH Memory MP3 NG: A Next Generation Consumer Platform XAPP169 (v1.0) November 24, 1999 www.xilinx.com 9 Micron SDRAM Memory Figure 9: KM29U64000T Read Timing (Courtesy Samsung Semiconductor) 10 www.xilinx.com XAPP169 (v1.0) November 24, 1999 MP3 NG: A Next Generation Consumer Platform Figure 10: MT48LC1M16A1 Block Diagram (Courtesy of Micron Technology, Inc.) Figure 11: MT48LC1M16A1 Read Timing (Courtesy of Micron Technology, Inc.) National Semiconductor USBN9602 USB Function Controller System Implementation Software Architecture fixpoint.tgz Xilinx Spartan- II FPGA IP Bus Controller CPU Interface LCD Controller ModeBit(9:6) Page Memory Interface SDRAM Controller FLASH Controller Page IRDA Controller Audio DAC Interface Touch Screen Interface Spartan Device Selection Conclusion References