MP3 NG: A Next Generation Consumer Platform
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Spartan Device Selection Spartan devices are available in a range of densities and packages. The followin g criteria were
used to select the device used in this application:
•I/O Pins. The design requires a total of 137 I/O pins. I/O pin requirements p er block are
summarized in FPGA Resource Usage Summary.
•Voltage. The design operates at 3.3V.
•Density. The estimated size of the design is 83,000 gates, with the usage broken out in
Tabl e 8.
•Performance. The highest clock speed used in the device is 64 MHz, used to clock the
SDRAM controller state machines. The remaining logic runs at sub mu ltiples of this clock
rate.
•Packaging. The size constraints imposed on most modem desig ns dictates a high-density
surface mount package.
Based on these criteria the device selected for this design is the XC2S 100. This device offers
100K gates density, 3.3V operation, 176 user I/O, and is packaged in a space saving FG256
BGA package.
Conclusion The design that has been outlined meets both original design objectives. Even with budgetary
pricing the cost of the solution is well below $100. Table 9 shows the cost breakdown of the
system. The design also has enough spare resources both in terms of CPU cycles and FPGA
gates to support field upgrades. Operating at a core clock speed of 64 MHz, th e RC32364 will
provide enough performance for both audio decoding and user interface functions. By locking
the audio decode functions in the instruction cache a significant increas e in system
performance as well as reduced power consumption is achieved.
This design also illustrates how manufacturers can create designs th at the optimized
integration of an ASIC while supporting the manufacturing and field upgra de flexibility of an
FPGA.
Table 8: FPGA Resource Usage Summary
Interface CLB Usage Number of Signals
CPU 25 51
LCD Display 58 9
IRDA 59 3
USB 21 3
DAC 23 5
ADC 0 3
SDRAM 100 9
FLASH 100 10
CompactFlash 100 17
Memory Address Bus 4 11
Memory Data Bus 10 16
Total : 500 137