Page 24
Intel® Server Board S5000PAL / S5000XAL TPS | Functional Architecture |
3.1Intel® 5000P and 5000X Memory Controller Hubs (MCH)
This section will describe the general functionality of the memory controller hub as it is implemented on this server board. Depending on the version of the server board in use, it may support either the Intel® 5000P MCH or the Intel® 5000X MCH. Features that are unique to a particular MCH will be so referenced.
The Memory Controller Hub (MCH) is a single 1432 pin FCBGA package which includes the following core platform functions:
•System Bus Interface for the processor sub-system
•Memory Controller
•PCI Express* Ports including the Enterprise South Bridge Interface (ESI)
•FBD Thermal Management
•SMBUS Interface
Additional information about MCH functionality can be obtained from the Intel® S5000 Series Chipsets Server Board Family Datasheet, the Intel® 5000P Memory Controller Hub External Design Specification (Yellow Cover), or the Intel® 5000X Memory Controller Hub External Design Specification (Yellow Cover).
Note: Yellow Cover documents can only be obtained under NDA with Intel and ordered through an Intel representative.
3.1.1System Bus Interface
The MCH is configured for symmetric multi-processing across two independent front side bus interfaces that connect to the Dual-Core Intel® Xeon® processors 5000 sequence. Each front side bus on the MCH uses a 64-bit wide 1066 or 1333 MHz data bus. The 1333 MHz data bus is capable of transferring data at up to 10.66 GB/s. The MCH supports a 36-bit wide address bus, capable of addressing up to 64 GB of memory. The MCH is the priority agent for both front side bus interfaces, and is optimized for one processor on each bus.
3.1.2Processor Support
The server board supports one or two Dual-Core Intel® Xeon® processors 5000 sequence, with system bus speeds of 667 MHz, 1066 MHz, and1333 MHz, and core frequencies starting at 2.67 GHz. Previous generations of the Intel® Xeon® processor are not supported on this server board.
Note: Only Dual-Core Intel® Xeon® processors 5000 sequence, that support system bus speeds of 667 MHz, 1066 MHz, and1333 MHz are supported on this server board. See the following table for a list of supported processors.
Revision 1.4 | 25 |
| Intel order number: D31979-007 |
Contents
Revision
Intel order number D31979-007
Iii
Intel Server Board S5000PAL / S5000XAL TPSRevision History
Date Revision Modifications Number
Disclaimers
Disclaimers Intel Server Board S5000PAL / S5000XAL TPS
Table of Contents
Jumper Block Settings
Light Guided Diagnostics
Power and Environmental Specifications
101
105
108
111
List of Figures Intel Server Board S5000PAL / S5000XAL TPS
Viii Revision Intel order number D31979-007
List of Tables
Intel Server Board S5000PAL / S5000XAL TPS List of Tables
List of Tables Intel Server Board S5000PAL / S5000XAL TPS
Page
Chapter Outline
Server Board Use Disclaimer
Introduction Intel Server Board S5000PAL / S5000XAL TPS
12Revision Intel order number D31979-007
Intel Server Board S5000PAL / S5000XAL Feature Set
Feature Description
Intel Server Board S5000PAL / S5000XAL TPS Product Overview
Server Board Layout
Product Overview Intel Server Board S5000PAL / S5000XAL TPS
14Revision Intel order number D31979-007
Connector and Component Locations
Sata
Light Guided Diagnostic LED Locations
LDM
External I/O Connector Locations
Server Board Mechanical Drawings
40.39
PCI BKT Drop Down
TP02294
10.16 16.51 113.13 199.21 285.75 182.83 274.32 298.51
Functional Architecture
Intel 5000P and 5000X Memory Controller Hubs MCH
System Bus Interface
Processor Support
Processor Population Rules
Common Enabling Kit CEK Design Support
Processor Support Matrix
26Revision Intel order number D31979-007
Memory Sub-system
CEK Processor Mounting
Memory Rasum Featuresi
Supported Memory
Dimm Population Rules and Supported Dimm Configurations
Minimum Non-Mirrored Mode Configuration
Branch Channel B Channel a
Non-mirrored mode memory upgrades
Recommended Four Dimm Configuration
Single Branch Mode Sparing Dimm Configuration
32Revision Intel order number D31979-007
ESB-2 IO Controller
Snoop Filter 5000X MCH only
PCI Sub-system
1.1 PCI32 32-bit, 33-MHz PCI Bus Segment
PXA 64-bit, 133MHz PCI-X* Bus Segment
1.3 PE1 One x4 PCI Express* Bus Segment
1.5 PE4, PE5 Two x4 PCI Express* Bus Segments
1.6 PE6, PE7 Two x4 PCI Express* Bus Segments
PCI Riser Slots
Serial ATA Support
Intel Embedded Server RAID Technology II Support
36Revision Intel order number D31979-007
Video Support
Parallel ATA Pata Support
USB 2.0 Support
Intel Embedded Server RAID Technology Option ROM
Video Modes
Video Memory Interface
Dual Video
Video Modes
Network Interface Controller NIC
Intel I/O Acceleration Technology
MAC Address Definition
NIC2 Status LED
Pin Signal Name Serial Port a Header Pin-out
Super I/O
Serial Ports
Serial a Header Pin-out
Pins What happens at system reset…
RJ45 Signal Abbreviation
Floppy Disk Controller
Keyboard and Mouse Support
Wake-up Control
System Health Support
42Revision Intel order number D31979-007
Platform Management
Board Connector Information
Board Connector Matrix
44Revision Intel order number D31979-007
Power Connectors
Power Connector Pin-out J3K3
Power Connector Pin-out J3K4
Power Supply Signal Connector Pin-out J1K1
Intel Remote Management Module RMM Connector
Intel RMM Connector Pin-out J1C5
Pin Signal Name
System Management Headers
Intel RMM NIC Connector
Pin Intel RMM NIC Module Connector Pin-out J1B2
Riser Card Slots
3 LCP/AUX Ipmb Header
Ipmb Header
Pin Side B PCI Spec Signal
Pin Side a PCI Spec Signal
Pin-Side B PCI Spec Signal Pin-Side a PCI Spec Signal
Full-height Riser Slot Pin-out J4F1
50Revision Intel order number D31979-007
Pin-Side B PCI Spec Signal Pin-Side a
52Revision Intel order number D31979-007
PAR64
SSI Control Panel Connector
Bridge Board Connector
Front Panel SSI Standard 24-pin Connector Pin-out J3H2
Pin Bridgeboard Connector Pin-out J4G1
54Revision Intel order number D31979-007
I/O Connector Pin-out Definition
VGA Connector
NIC Connectors
VGA Connector Pin-out J6A1
IDE Connector
Intel I/O Expansion Module Connector
Pin IDE Connector Pin-out J3G1
56Revision Intel order number D31979-007
Sata Connectors
Sata Connector Pin-out J1H1, J1G2, J1G1, J1F2, J1E3
Serial Port Connectors
Keyboard and Mouse Connector
USB 2.0 Connectors
External USB Connector Pin-out J5A1, J6A2
Internal USB Connector Pin-out J1J1
SSI Fan Connector Pin-out J9K1,J5K1,J3K1,J3K2,J7A2,J7A1
Pin Signal Name Type Description
Fan Headers
60Revision Intel order number D31979-007
Recovery Jumper Blocks
Recovery Jumpers J1D1, J1D2, J1D3
Jumper Name Pins What happens at system reset…
Cmos Clear and Password Reset Usage Procedure
BMC Force Update Procedure
62Revision Intel order number D31979-007
Bios Select Jumper
Bios Select Jumper J3H1
External RJ45 Serial Port Jumper Block
Light Guided Diagnostics
5-Volt Standby LED
System ID LED and System Status LED
66Revision Intel order number D31979-007
System Status LED BMC Initialization
Color State Criticality Description
Dimm Fault LEDs
Processor Fault LED
Post Code Diagnostic LEDs
Server Board Design Specifications
70Revision Intel order number D31979-007
Server Board Power Requirements
Processor Power Support
TDP Power Max Tcase Icc MAX 130 W 70º C 150 a
Turn On No Load Operation
Load Ratings
No load operating range
72Revision Intel order number D31979-007
Grounding
Standby Outputs
Remote Sense
Voltage Regulation
Common Mode Noise
Dynamic Loading
Capacitive Loading
Closed-Loop Stability
Ripple / Noise
Soft Starting
Timing Requirements
Ripple and Noise
Out 10% V out
MIN MAX Units
Residual Voltage Immunity in Standby Mode
78Revision Intel order number D31979-007
Product Safety & Electromagnetic EMC Compliance
Australia / New Zealand AS/NZS 3548 Emissions
Reference Example
Electromagnetic Compatibility Notices
FCC Verification Statement USA
ICES-003 Canada
Europe CE Declaration of Conformity
Bsmi Taiwan
RRL Korea
English translation of the notice above
Product Ecology Compliance
Other Markings
Japan Recycling
Compliance Compliance Reference Description Marking Example
Appendix a Integration and Usage Tips
84Revision Intel order number D31979-007
Assertion / De-assertion Enables
Sensor Type
Event / Reading Type
Event Offset/Triggers
Default Hysteresis
Criticality
Standby
86Revision Intel order number D31979-007
Value Bility Type
NMI
STB
Revision
Revision Intel order number D31979-007
Revision
Acpi
Bios EPS
PCIe Link1
Revision
Dimm A2
Dimm D2
ECC
100 Revision Intel order number D31979-007
B01 Dimm
Post Progress Code LED Example
LEDs Red Green
102Revision Intel order number D31979-007
Revision 103 Intel order number D31979-007
Runtime Phase / EFI Operating System Boot
Pre-EFI Initialization Module Peim / Recovery
104Revision Intel order number D31979-007
Post Error Messages and Handling
Error Code Error Message Response
Revision Intel order number D31979-007 105
106Revision Intel order number D31979-007
ROM
Post Error Beep Codes
Post Error Beep Codes
BMC Beep Codes
Revision 107 Intel order number D31979-007
Appendix E Supported Intel Server Chassis
Page
Slim-Line Optical Drive Bay
Intel Server Board S5000PAL / S5000XAL TPS Glossary
Revision 111 Intel order number D31979-007
Term Definition
Glossary Intel Server Board S5000PAL / S5000XAL TPS
112Revision Intel order number D31979-007
Revision 113 Intel order number D31979-007
Reference Documents
114Revision Intel order number D31979-007