Konica Minolta PCI-1712L user manual PCI-Bus Mastering Data Transfer, Plug-and-Play Function

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Chapter 1

PCI-Bus Mastering Data Transfer

The PCI-1712/1712L supports PCI-Bus mastering DMA for high-speed data transfer and gap-free analog input and analog output. By setting aside a block of memory in the PC, the PCI-1712/1712L performs bus- mastering data transfers without CPU intervention, setting the CPU free to perform other more urgent tasks such as data analysis and graphic manipulation. The function allows users to run all I/O func- tions simultaneously at full speed without losing data.

Plug-and-Play Function

The PCI-1712/1712L is a Plug-and-Play device, which fully complies with the PCI Specification Rev 2.2. During card installation, you have no need to set any jumpers or DIP switches. Instead, all bus-related configurations such as base I/O address and interrupt are automati- cally done by the Plug-and-Play function.

On-board FIFO Memory

The PCI-1712/1712L provides an on-board FIFO (First In First Out) memory buffer, storing up to 1K samples for A/D and 32K for D/A conversion (PCI-1712 only).

Automatic Channel/Gain/SD*/BU* Scanning

PCI-1712/1712L features an automatic channel/Gain/SD/BU scanning circuit. This circuit controls multiplexer switching during sampling in a way that is much more efficient than software implementation. On- board SRAM stores different gain, SD and BU values for each channel. This combination lets user perform multi-channelhigh-speed sampling with different gain, SD and BU values for each channel.

SD: Single-Ended/Differential Analog Input

BU: Bipolar/Unipolar

Flexible Triggering and Clocking Capabilities

The PCI-1712/1712L provides flexibility in triggering action, both in the available trigger modes and trigger events for analog input. You can acquire data using post-trigger,pre-trigger,delay-triggerand about- trigger modes. The trigger source could be either analog or digital signal. The analog trigger could originate from a dedicated input pin. In fact, you can designate any of the analog input channels as the analog trigger input. You can also set the analog trigger level within a voltage range from zero to A/D FSR. When trigger signal being digital, you can pace A/D and D/A conversion using software interrupt, internal or external clock.

PCI-1712/1712L User’s Manual

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Advantech Co., Ltd.

 

 

www.advantech.com

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Contents MS/s, 12-bit, 16-ch High- Speed Multifunction Card PCI-1712/1712L Quick Start Unpacking Device Installation Page Contents Calibration Appendix D. Register Structure and Format100 Figures Auto A/D Calibration Dialog Box Table D-1PCI-1712/1712L register format Part Table D-2 I/O Connector Signal Description PartCorresponding Full Scale values for various Input Table D-3102 100101 Page Features IntroductionOn-board Fifo Memory PCI-Bus Mastering Data TransferPlug-and-Play Function Automatic Channel/Gain/SD*/BU* ScanningContinuous Analog Output Installation GuideOn-board Programmable Multifunction Counter/Timer Installation Flow Chart Wiring Boards AccessoriesWiring Cable Chapter Installation UnpackingDriver Installation Setup Screen of Advantech Automation SoftwareHardware Installation Different options for Driver SetupChapter Device name listed on the Device Manager Device Setup & Configuration Setting Up the DeviceConfiguring the Device Devices Found dialog boxFor unipolar For bipolarDevice Testing Testing Analog Input FunctionTesting Analog Output Function PCI-1712 only Testing Digital Input FunctionTesting Digital Output Function Testing Counter Function14 Digital output tab on the Device Test dialog box Overview Signal ConnectionsI/O Connector Pin AssignmentI/O connector pin assignments for the PCI-1712/1712L Connector Signal Description I/O Connector Signal Description PartSignal Name Reference Direction Description Counter 0 Gate Input. This pin is for Differential Channel Connections Analog Input ConnectionsSingle-ended Channel Connections Chapter Differential input channel connection floating signal Source Analog Output Connections Analog output connectionsField Wiring Considerations DLL Driver Software OverviewProgramming Choices Register-level ProgrammingDLL Driver Programming Roadmap Programming ToolsTroubleshooting DLL Driver Error Programming with DLL Driver Function LibraryChapter Analog Input Ranges and Gains Analog Input FeaturesPrinciples of Operation Gains and Analog Input RangeAnalog Input Acquisition Modes Post-Trigger Acquisition Mode About-Trigger Acquisition Mode Pre-Trigger Acquisition Mode Sample Clock SourcesPCI-1712/1712L Sample Clock Source Trigger SourcesAnalog Input Data Format Analog Input Data FormatAnalog Output Operation Modes Analog Output FeaturesAnalog Output Ranges Output Clock Sources Trigger Sources Analog Output Data Format Digital I/O FeaturesAnalog Output Data Format Counter/Timer Features Clock sourcesGate Types and Sources Counter/timer operation modes Chapter Chapter Frequency measurement Chapter Chapter Pulse width measurement Internal, and gate use for pulse Show the duty ratio of positive Calibration VR AssignmentA/D Calibration D/A Calibration Calibration Utility Selecting the device you want to calibrateChannel Auto-Calibration Auto A/D Calibration Dialog BoxA/D Calibration Procedure A/D Calibration is finished Range Selection in D/A Calibration 11 Calibrating D/A Channel Channel Manual-Calibration 13 Selecting Input Rage in Manual A/D Calibration panel14 Adjusting registers 15 & -16 Selecting D/A Range Choosing Output Voltage 17 Adjusting registers Chapter Specification Analog InputAnalog Output PCI-1712 only Digital Input /OutputCounter/Timer GeneralAppendix a Block Diagram Block DiagramAppendix B Screw-terminal Board Board LayoutPin Assignment Figure C-2 CN2 pin assignments for the PCLD-8712Single-ended Connections Differential Connections Register Structure and Format I/O Port Address MapAppendix D Table D-1 PCI-1712/1712L register format PartBase PCI-1712/1712L Register Format Address Channel data for continuous output operation mode 30 W Data of A/D Conversion A/D Single Value Acquisition Write BASE+0Channel and A/D data Read Base + CH2 to CH0 Channel NumberSingle-ended or Differential A/D Channel Range Setting Write BASE+2Table D-3 Register for A/D channel range setting Bipolar or UnipolarTable D-5 Register for multiplexer control MUX Control Write BASE+4Table D-4 Gain Codes for the PCI-1712/1712L Start Scan Channel NumberAppendix D Table D-6 Register for A/D control/status Analog input acquisition mode registerA/D Control/Status Register Write/Read BASE+6 Trigger edge control register Sample clock source select registerTrigger source control register Analog I/O calibration bitTable D-8 Register for clear interrupt and Fifo Clear interrupt and Fifo Write BASE+8Aitrgf Analog input trigger flag Clear A/D FifoFifo empty flag Interrupt and Fifo status Read BASE+8Interrupt flag Fifo half-full flag10 D/A control/status register Write/Read BASE+A Clock source select register Table D-11 Analog output operation modeChannel 1 unipolar or bipolar output Aotrgf Analog output trigger flagData 11 D/A Channel 0/1 Data Write BASE+C/ETable D-12 Register for D/A channel 0/1 data 12 82C54 Counter Chip 0 Write/Read BASE+10 to Table D-13 Register for 82C54 counter chip13 82C54 counter chip 1 Write/Read BASE+18 to 1E Table D-14 Register for 82C54 counter chipCn1 to Cn0 Counter clock source control register n = 0,1,2 Table D-16 Table of Cn1 to Cn0 registerGn1 to Gn0 Counter gate source control register n = 0,1,2 CPn Counter clock edge control register n = 0,1,2CQn Counter clock set register n = 0,1,2 Table D-17 Table of Gn1 to Gn0 registerGQn Counter gate set register n = 0,1,2 GRn Pulse width measurement reset register n = 0,1,2GPn Counter gate polarity control register n = 0,1,2 GATEn Gate status n = 0,1,2CLKSEL1 & 0 Counter internal clock select register Digital I/O registers Write/Read BASE+28GATESn Pulse width measurement status bit n = 0,1,2 DO15 to DO0 Digital output data registerDIOC1 to DIOC0 Digital I/O configuration register Digital I/O configuration registers Write/Read BASE+2ACalibration command registers Write BASE+2C DI15 to DI0 Digital input data registerD7 to D0 Calibration data CM3 to CM0 Calibration commandTable D-23 Calibration command Table D-24 Register for D/A channel data DA11 to DA0 D/A data

PCI-1712L, PCI-1712 specifications

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