DIMM and memory configurations must adhere to the following:
•2.5 V (only)
•Unbuffered
•Maximum total system memory: 2 GB; Minimum total system memory: 64 MB
•200/266 MHz DDR SDRAM DIMMs only
•Serial Presence Detect (SPD)
•Suspend to RAM
•
•Only DIMMs tested and qualified by Intel or a designated memory test vendor will be supported on the
Intel 845E Chipset
The Intel 845E chipset consists of the following devices:
•Intel 82845E Memory Controller Hub (MCH) with Accelerated Hub Architecture (AHA) bus
•Intel 82801BA I/O Controller Hub (ICH2) with AHA bus
•Intel 82802AB Firmware Hub (FWH)
The MCH is a centralized controller for the system bus, the memory bus, the AGP bus, and the Accelerated Hub Architecture interface. The ICH2 is a centralized controller for the board’s I/O paths. The FWH provides the nonvolatile storage of the BIOS.
Intel 82845E Memory Controller Hub (MCH)
The MCH supports the data integrity features supported by the Pentium Pro bus, including address, request, and response parity. The 845E chipset always generates ECC data while it is driving the processor data bus, although the data bus ECC can be disabled or enabled by BIOS. It is enabled by default.
The MCH provides the following:
•An integrated Synchronous DRAM memory controller with auto detection of SDRAM.
•Support for ACPI Rev 1.0b compliant power management.
14 | Intel Server Board |