Intel S845WD1-E manual PCI I/O Subsystem, 32-bit, 33-MHz PCI Subsystem, Device IDs Idsel

PCI I/O Subsystem

The primary I/O bus for the S845WD1-E server board is PCI, with one independent PCI bus. The PCI bus complies with the PCI Local Bus Specification, Rev 2.2. The PCI bus is directed through the Intel 82801BA I/O Controller Hub (ICH2). The table below lists the characteristics of the PCI bus.

Table 9.	PCI Bus Characteristics
Voltage	Width	Speed	Type	Comments
5 V	32-bits	33 MHz	Independent Bus	Supports full-length cards

32-bit, 33-MHz PCI Subsystem

All 32-bit, 33-MHz PCI I/O for the S845WD1-E server board is directed through the

Intel 82801BA I/O Controller Hub (ICH2). The PCI bus supports the following embedded devices and connectors:

•2D/3D Graphics Accelerator: ATI Rage XL Video Controller.

•Two 10/100 Network Interface Controllers: Intel 82550PM Fast Ethernet Controller.

•ATA-100 controller: Promise Technology PDC20267.

•Two Ultra DMA 33 / ATA 66/100 connectors.

Each of the embedded devices listed above, with exception to the Ultra DMA 33 / ATA 66/100 connectors, will be allocated a GPIO to disable the device.

Device IDs (IDSEL)

Each device under the PCI hub bridge has its IDSEL signal connected to one bit of AD[31:16], which acts as a chip select on the PCI bus segment in configuration cycles. This determines a unique PCI device ID value for use in configuration cycles. The following table shows each IDSEL value for the PCI bus devices and the corresponding device description.

Table 10. PCI Bus Configuration IDs

IDSEL Value	Device
25	PCI slot 1	(closest to AGP connector)
26	PCI slot 2	(middle slot)
27	PCI slot 3	(closest to left edge of board)
28	Intel® 82550PM Fast Ethernet Controller
29	Intel 82550PM Fast Ethernet Controller

continued

Description 35