Intel 317443-001US user manual Acronyms Sheet 1 of, Power-Good

Page 11
Power-Good

About This Manual—Intel®945GME Express Chipset

 

Power-Good

“Power-Good,” “PWRGOOD,” or “CPUPWRGOOD” (an active high

 

 

signal) indicates that all of the system power supplies and clocks

 

 

are stable. PWRGOOD should go active a predetermined time

 

 

after system voltages are stable and should go inactive as soon

 

 

as any of these voltages fail their specifications.

 

Ringback

The voltage to which a signal changes after reaching its

 

 

maximum absolute value. Ringback may be caused by

 

 

reflections, driver oscillations, or other transmission line

 

 

phenomena.

 

System Bus

The System Bus is the microprocessor bus of the processor.

 

Setup Window

The time between the beginning of Setup to Clock (TSU_MIN)

 

 

and the arrival of a valid clock edge. This window may be

 

 

different for each type of bus agent in the system.

 

Simultaneous Switching Output

 

 

Simultaneous Switching Output (SSO) effects are differences in

 

 

electrical timing parameters and degradation in signal quality

 

 

caused by multiple signal outputs simultaneously switching

 

 

voltage levels in the opposite direction from a single signal or in

 

 

the same direction. These are called odd mode and even mode

 

 

switching, respectively. This simultaneous switching of multiple

 

 

outputs creates higher current swings that may cause additional

 

 

propagation delay (“push-out”) or a decrease in propagation

 

 

delay (“pull-in”). These SSO effects may impact the setup and/

 

 

or hold times and are not always taken into account by

 

 

simulations. System timing budgets should include margin for

 

 

SSO effects.

 

Stub

The branch from the bus trunk terminating at the pad of an

 

 

agent.

 

Trunk

The main connection, excluding interconnect branches, from

 

 

one end

 

System Management Bus

 

 

A two-wire interface through which various system components

 

 

may communicate.

 

Undershoot

The minimum voltage extending below VSS observed for a

 

 

signal at the device pad.

 

VCC (CPU core)

VCC (CPU core) is the core power for the processor. The system

 

 

bus is terminated to VCC (CPU core).

 

Victim

A network that receives a coupled crosstalk signal from another

 

 

network is called the victim network.

 

Table 1 defines the acronyms used throughout this document.

Table 1.

Acronyms (Sheet 1 of 3)

 

 

 

 

Acronym

Definition

 

 

 

 

AC

Audio Codec

 

 

 

 

ACPI

Advanced Configuration and Power Interface

 

 

 

 

AGTL

Assisted Gunning Transceiver Logic

 

 

 

 

AMC

Audio/Modem Codec.

 

 

 

 

ASF

Alert Standard Format

 

 

 

 

AMI

American Megatrends Inc. (BIOS developer)

 

 

 

 

 

Intel® CoreTM 2 Duo processor with the Mobile Intel® 945GME Express Chipset

May 2007

 

Manual

Order Number: 317443-001US

11

Image 11
Contents Order Number 317443-001US Development Kit User’s ManualManual Contents Tables FiguresSATA Port 2 Mobile Drive Connector Pinout J8J2 IDE Connector J7J1SATA Port 0 Data Connector Pinout J7H1 SATA Port 0 Power Connector Pinout J6H3Intel 945GME Express Chipset-Revision History Revision History1.2 Text Conventions 1.1 Content Overview1.0 About This Manual Units of Measure Signal NamesInstructions NumbersAssisted Gunning Transceiver Logic+ 1.3 Glossary of Terms and AcronymsAggressor Anti-etchNetwork Inter-Symbol InterferenceIMVP6 Media Expansion CardPower-Good Acronyms Sheet 1 ofAcronyms Sheet 2 of Acronyms Sheet 3 of 1.4.2 Additional Technical Support 1.4 Support Options1.5 Product Literature 1.4.1 Electronic Support SystemsMobile Intel 945 Express Chipset Family Datasheet 1.6 Related DocumentsRelated Documents Update2.1 Overview 2.1.1 Intel 945GME Express Chipset Development Kit Features2.0 Getting Started Clocking Connector Interface SummaryDebug Features Miscellaneous Features2.2 Included Hardware and Documentation 2.3.1 AMI* BIOS2.3 Software Key Features 2.4 Before You Begin remove any hardware unless the system is unplugged 2.5 Setting Up the Evaluation Boardused when handling the board cables to this product2.6 Configuring the BIOS 3.0 Theory of Operation 3.1 Block DiagramFigure 1. Intel 945GME Express Chipset Development Kit Block Diagram 3.4.1 IntelR 945GME GMCH 3.4 System Features and Operation3.2 Mechanical Form Factor 3.3 Thermal Management3.4.1.3 Advanced Graphics and Display Interface 3.4.2 ICH7-M3.4.1.1 System Memory 3.4.1.2 DMI3.4.2.5 ATA / Storage 3.4.2.2 PCI Slots3.4.2.3 On-Board LAN 3.4.2.4 AC’97 and High Definition Audio3.4.2.8 Serial, IrDA 3.4.2.6 USB Connectors3.4.2.9 BIOS Firmware Hub FWH 3.4.2.7 LPC Super I/O SIO/LPC Slot3.4.2.13 Thermal Monitoring 3.4.3 System I/O and Connector Summary3.4.2.11 Clocks 3.4.2.12 Real Time Clock3.4.3.3 IDE Support 3.4.3.5 VGA Connector3.4.3.1 PCI Express* Support 3.4.3.2 SATA Support3.4.4 POST Code Debugger 3.4.3.7 32 bit/33 MHz PCI Connectors3.4.3.8 Ethernet Gigabit LAN Interface connector 3.5 Clock Generation3.6 Power Management States 3.6.3 Transition to S5 3.7 Power Measurement Support3.6.1 Transition to S3 3.6.2 Transition to S4Voltage Groups Powered duringR is the value of the sense resistor typically 0.002 Ω V is the voltage measured across the sense resistorTheory of Operation-Intel 945GME Express Chipset Intel 945GME Express Chipset-Theory of Operation 4.0 Hardware Reference 4.1 Primary FeaturesDesignator Default SettingIntel 945GME Express Chipset-Hardware Reference ReferenceHardware Reference-Intel 945GME Express Chipset 4.2 Back Panel Connectors 4.3 Configuration Settings Supported Configuration Jumper/Switch Settings Sheet 1 of Supported Configuration Jumper/Switch Settings Sheet 2 of 4.4 Power On and Reset Buttons Table 9. Intel 945GME Express Chipset LED Function Legend 4.5 LEDs4.6 Other Headers, Slots, and Sockets 4.6.1 H8 Programming HeadersExpansion Slots and Sockets 4.6.2 Expansion Slots and Sockets4.6.2.1 478 Pin Grid Array Micro-FCPGA Socket H8 Programming JumpersPCI Express* x16 Pinout J6C1 Sheet 1 of 4.6.2.2 PCI ExpressPCI Express* x16 Pinout J6C1 Sheet 2 of MEC Slot J6C1 Sheet 1 of 4.6.2.3 Media Expansion Card MEC SlotTable 12. PCI Express* x16 Pinout J6C1 Sheet 3 of Intel 945GME Express Chipset-Hardware Reference MEC Slot J6C1 Sheet 2 ofPCI Express* x1 Pinout J7C1, J8C1 Sheet 1 of 4.6.2.4 PCI ExpressMEC Slot J6C1 Sheet 3 of Table 14. PCI Express* x1 Pinout J7C1, J8C1 Sheet 2 of 4.6.2.6 SATA Pinout 4.6.2.5 IDE ConnectorIDE Connector J7J1 Table 16. SATA Port 0 Data Connector Pinout J7H1Table 19. Fan Connectors J3F1 and J3C1 4.6.2.7 Fan ConnectorsTable 17. SATA Port 0 Power Connector Pinout J6H3 Table 18. SATA Port 2 Mobile Drive Connector Pinout J8J2Figure 6. Heatsink and Backplate Appendix A Heat Sink Installation InstructionsIntel 945GME Express Chipset-Heat Sink Installation Instructions Figure 7. Backplate PinsFigure 9. Squeezing Activation Arm Figure 8. Applying the Thermal GreaseFigure 10. Installing the Heatsink Figure 11. Plugging in the Fan Figure 12. Completed Assembly