USB Connectors, LPC Super I/O SIO/LPC Slot

Intel® 945GME Express Chipset—Theory of Operation

The Intel® 945GME Express Chipset also supports ‘ATA swap’ capability for both the parallel IDE channel and the serial ATA channels. A device can be powered down by software and the port can then be disabled, allowing removal and insertion of a new device. The parallel IDE device should be powered from the power connector, J4J2, on the Intel® 945GME Express Chipset to utilize the hot swap feature. This feature requires customer-developed software support.

Desktop hard drives must be powered using the external ATX power supply, not the onboard power supply.

The Intel® 945GME Express Chipset includes Intel® Matrix Storage Technology, providing greater performance and reliability through features such as Native Command Queuing (NCQ) and RAID 0/1. For more information about Intel® Matrix Storage Technology, refer to Intel’s website at:

http://www.intel.com/design/chipsets/matrixstorage_sb.htm

3.4.2.6USB Connectors

The ICH7-M provides a total of eight USB 2.0 ports. Three ports are routed to a triple- stack USB connector at J3A1. Two ports are routed to a combination RJ-45/dual USB connector at J5A1B. Three ports are routed to USB front panel headers at J6H2 and J7E2.

3.4.2.7LPC Super I/O (SIO)/LPC Slot

An SMSC LPC47N207 serves as the SIO on the Intel® 945GME Express Chipset platform. Shunting the jumper at J7E3 to the 2-3 positions can disable the SIO by holding it in reset. This allows other SIO solutions to be tested in the LPC slot at J8F1. A sideband header is provided at J9G2 for this purpose. This sideband header also has signals for LPC power management. Information on this header is on sheet 35 of the Intel® 945GME Express Chipset schematics and is detailed in the “LPC Slot and Sideband Header Specification” (refer to Table 3, “Related Documents” on page 15).

3.4.2.8Serial, IrDA

The SMSC SIO incorporates a serial port, and IrDA (Infrared), as well as general purpose IOs (GPIO). The serial port connector is provided at J2A2A, and the IrDA transceiver is located at U4A1. The IrDA transceiver on Intel® 945GME Express Chipset supports both SIR (slow IR) and CIR (Consumer IR). The option to select between the two is supported through software and GPIO pin on the SIO.

3.4.2.9BIOS Firmware Hub (FWH)

The 8 Mbit Flash device used on the Intel® 945GME Express Chipset to store system and video BIOS as well as an Intel Random Number Generator (RNG) is a socketed E82802AC8 a 32-pin PLCC package. The reference designator location of the FWH device is U8G1. The BIOS can be upgraded using an MS-DOS* based utility and is addressable on the LPC bus off of the ICH7-M.

3.4.2.10System Management Controller (SMC)/Keyboard Controller

The Hitachi* H8S/2104V serves as both SMC and KBC for the platform. The SMC/KBC controller supports two PS/2 ports, battery monitoring and charging, EMA support, wake/runtime SCI events, and power sequencing control. The two PS/2 ports on the Intel® 945GME Express Chipset are for legacy keyboard and mouse. The keyboard plugs into the bottom jack and the mouse plugs into the top jack at J1A1. Scan matrix keyboards can be supported via an optional connector at J9E1.

Intel® CoreTM 2 Duo processor with the Mobile Intel® 945GME Express Chipset
Manual	May 2007
26	Order Number: 317443-001US