Intel 317443-001US SATA Pinout, IDE Connector J7J1, SATA Port 0 Data Connector Pinout J7H1

Page 51
4.6.2.5IDE Connector

Hardware Reference—Intel®945GME Express Chipset

4.6.2.5IDE Connector

The IDE interface can support up to two devices, a master and a slave. Ensure that the jumpers on the drives are properly selected for the given configuration. Mobile drives with an IDE interface will require an adapter to connect to this port. This adapter is included in the Development Kit.

Table 15.

IDE Connector (J7J1)

 

 

 

 

 

 

 

 

Pin

Signal

Pin

Signal

 

 

 

 

 

 

1

Reset IDE

2

Ground

 

 

 

 

 

 

3

Host Data 7

4

Host Data 8

 

 

 

 

 

 

5

Host Data 6

6

Host Data 9

 

 

 

 

 

 

7

Host Data 5

8

Host Data 10

 

 

 

 

 

 

9

Host Data 4

10

Host Data 11

 

 

 

 

 

 

11

Host Data 3

12

Host Data 12

 

 

 

 

 

 

13

Host Data 2

14

Host Data 13

 

 

 

 

 

 

15

Host Data 1

16

Host Data 14

 

 

 

 

 

 

17

Host Data 0

18

Host Data 15

 

 

 

 

 

 

19

Ground

20

Key

 

 

 

 

 

 

21

DRQ3

22

Ground

 

 

 

 

 

 

23

I/O Write

24

Ground

 

 

 

 

 

 

25

I/O Read

26

Ground

 

 

 

 

 

 

27

I/O Ch Ready

28

CSEL

 

 

 

 

 

 

29

DACK 3

30

Ground

 

 

 

 

 

 

31

IRQ 14

32

NC

 

 

 

 

 

 

33

Address 1

34

DATA Detect

 

 

 

 

 

 

35

Address 0

36

Address 2

 

 

 

 

 

 

37

Chip Select 0

38

Chip Select 1

 

 

 

 

 

 

39

Activity

40

Ground

 

 

 

 

 

4.6.2.6SATA Pinout

Table 16. SATA Port 0 Data Connector Pinout (J7H1)

Pin

Signal

 

 

1

GND

 

 

2

TXP

 

 

3

TXN

 

 

4

GND

 

 

5

RXN

 

 

6

RXP

 

 

7

GND

 

 

 

Intel® CoreTM 2 Duo processor with the Mobile Intel® 945GME Express Chipset

May 2007

Manual

Order Number: 317443-001US

51

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Contents Order Number 317443-001US Development Kit User’s ManualManual Contents Tables FiguresSATA Port 2 Mobile Drive Connector Pinout J8J2 IDE Connector J7J1SATA Port 0 Data Connector Pinout J7H1 SATA Port 0 Power Connector Pinout J6H3Intel 945GME Express Chipset-Revision History Revision History1.1 Content Overview 1.0 About This Manual1.2 Text Conventions Units of Measure Signal NamesInstructions NumbersAssisted Gunning Transceiver Logic+ 1.3 Glossary of Terms and AcronymsAggressor Anti-etchNetwork Inter-Symbol InterferenceIMVP6 Media Expansion CardPower-Good Acronyms Sheet 1 ofAcronyms Sheet 2 of Acronyms Sheet 3 of 1.4.2 Additional Technical Support 1.4 Support Options1.5 Product Literature 1.4.1 Electronic Support SystemsMobile Intel 945 Express Chipset Family Datasheet 1.6 Related DocumentsRelated Documents Update2.1.1 Intel 945GME Express Chipset Development Kit Features 2.0 Getting Started2.1 Overview Clocking Connector Interface SummaryDebug Features Miscellaneous Features2.3.1 AMI* BIOS 2.3 Software Key Features2.2 Included Hardware and Documentation 2.4 Before You Begin remove any hardware unless the system is unplugged 2.5 Setting Up the Evaluation Boardused when handling the board cables to this product2.6 Configuring the BIOS 3.1 Block Diagram Figure 1. Intel 945GME Express Chipset Development Kit Block Diagram3.0 Theory of Operation 3.4.1 IntelR 945GME GMCH 3.4 System Features and Operation3.2 Mechanical Form Factor 3.3 Thermal Management3.4.1.3 Advanced Graphics and Display Interface 3.4.2 ICH7-M3.4.1.1 System Memory 3.4.1.2 DMI3.4.2.5 ATA / Storage 3.4.2.2 PCI Slots3.4.2.3 On-Board LAN 3.4.2.4 AC’97 and High Definition Audio3.4.2.8 Serial, IrDA 3.4.2.6 USB Connectors3.4.2.9 BIOS Firmware Hub FWH 3.4.2.7 LPC Super I/O SIO/LPC Slot3.4.2.13 Thermal Monitoring 3.4.3 System I/O and Connector Summary3.4.2.11 Clocks 3.4.2.12 Real Time Clock3.4.3.3 IDE Support 3.4.3.5 VGA Connector3.4.3.1 PCI Express* Support 3.4.3.2 SATA Support3.4.4 POST Code Debugger 3.4.3.7 32 bit/33 MHz PCI Connectors3.4.3.8 Ethernet Gigabit LAN Interface connector 3.5 Clock Generation3.6 Power Management States 3.6.3 Transition to S5 3.7 Power Measurement Support3.6.1 Transition to S3 3.6.2 Transition to S4Voltage Groups Powered duringR is the value of the sense resistor typically 0.002 Ω V is the voltage measured across the sense resistorTheory of Operation-Intel 945GME Express Chipset Intel 945GME Express Chipset-Theory of Operation 4.0 Hardware Reference 4.1 Primary FeaturesDesignator Default SettingIntel 945GME Express Chipset-Hardware Reference ReferenceHardware Reference-Intel 945GME Express Chipset 4.2 Back Panel Connectors 4.3 Configuration Settings Supported Configuration Jumper/Switch Settings Sheet 1 of Supported Configuration Jumper/Switch Settings Sheet 2 of 4.4 Power On and Reset Buttons Table 9. Intel 945GME Express Chipset LED Function Legend 4.5 LEDs4.6 Other Headers, Slots, and Sockets 4.6.1 H8 Programming HeadersExpansion Slots and Sockets 4.6.2 Expansion Slots and Sockets4.6.2.1 478 Pin Grid Array Micro-FCPGA Socket H8 Programming JumpersPCI Express* x16 Pinout J6C1 Sheet 1 of 4.6.2.2 PCI ExpressPCI Express* x16 Pinout J6C1 Sheet 2 of 4.6.2.3 Media Expansion Card MEC Slot Table 12. PCI Express* x16 Pinout J6C1 Sheet 3 ofMEC Slot J6C1 Sheet 1 of Intel 945GME Express Chipset-Hardware Reference MEC Slot J6C1 Sheet 2 of4.6.2.4 PCI Express MEC Slot J6C1 Sheet 3 ofPCI Express* x1 Pinout J7C1, J8C1 Sheet 1 of Table 14. PCI Express* x1 Pinout J7C1, J8C1 Sheet 2 of 4.6.2.6 SATA Pinout 4.6.2.5 IDE ConnectorIDE Connector J7J1 Table 16. SATA Port 0 Data Connector Pinout J7H1Table 19. Fan Connectors J3F1 and J3C1 4.6.2.7 Fan ConnectorsTable 17. SATA Port 0 Power Connector Pinout J6H3 Table 18. SATA Port 2 Mobile Drive Connector Pinout J8J2Figure 6. Heatsink and Backplate Appendix A Heat Sink Installation InstructionsIntel 945GME Express Chipset-Heat Sink Installation Instructions Figure 7. Backplate PinsFigure 9. Squeezing Activation Arm Figure 8. Applying the Thermal GreaseFigure 10. Installing the Heatsink Figure 11. Plugging in the Fan Figure 12. Completed Assembly
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