Intel 317443-001US Power Measurement Support, Transition to S3, Transition to S4, P= V 2 R

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3.6.1Transition to S3

Theory of Operation—Intel®945GME Express Chipset

3.6.1Transition to S3

If enabled, the transition to S3 from the full-on state can be accomplished in the following ways:

The OS performs the transition through software.

Press the front panel power button for less than four seconds (assuming the OS power management support has been enabled).

Note: The power button is accessed by adding a switch to the pins 5 and 6 on the front panel header J8J1.

3.6.2Transition to S4

“Wake on S4” (Suspend to disk) is controlled by the operating system.

3.6.3Transition to S5

The transition to S5 is accomplished by the following means:

Press the front panel power button for less than four seconds (if enabled through the OS).

Press the front panel power button for more than four seconds to activate power button override.

3.6.4Transition to Full-On

The transition to the Full-On state can be from S3 or S5. The transition from S3 is a low latency transition that is triggered by one of the following wake events:

Power management timer expiration

Real Time Clock (RTC) triggered alarm

Power button activation

USB device interrupt

ICH7M pin PME# assertion

AC power loss

For AC power loss, the system operation is defined by register settings in the Intel ICH7-M. Upon the return of power, a BIOS option, set prior to the power loss, allows the system to either go immediately to the S5 state, or reboot to the Full-On state, no matter what the state was before the power loss. External logic for this functionality is not necessary. If the BIOS remains in the S5 state after AC power loss, only the power button or the RTC alarm can bring the system out of the S5 state. The status of enabled wake events will be lost.

3.7Power Measurement Support

Power measurement resistors are provided on the platform to measure the power of most subsystems. All power measurement resistors have a tolerance of 1%. The value of these power measurement resistors are 2 mΩ by default. Power on a particular subsystem is calculated using the following formula:

P= V 2 R

 

Intel® CoreTM 2 Duo processor with the Mobile Intel® 945GME Express Chipset

May 2007

Manual

Order Number: 317443-001US

31

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Contents Order Number 317443-001US Development Kit User’s ManualManual Contents Tables FiguresSATA Port 2 Mobile Drive Connector Pinout J8J2 IDE Connector J7J1SATA Port 0 Data Connector Pinout J7H1 SATA Port 0 Power Connector Pinout J6H3Intel 945GME Express Chipset-Revision History Revision History1.0 About This Manual 1.1 Content Overview1.2 Text Conventions Units of Measure Signal NamesInstructions NumbersAssisted Gunning Transceiver Logic+ 1.3 Glossary of Terms and AcronymsAggressor Anti-etchNetwork Inter-Symbol InterferenceIMVP6 Media Expansion CardPower-Good Acronyms Sheet 1 ofAcronyms Sheet 2 of Acronyms Sheet 3 of 1.4.2 Additional Technical Support 1.4 Support Options1.5 Product Literature 1.4.1 Electronic Support SystemsMobile Intel 945 Express Chipset Family Datasheet 1.6 Related DocumentsRelated Documents Update2.0 Getting Started 2.1.1 Intel 945GME Express Chipset Development Kit Features2.1 Overview Clocking Connector Interface SummaryDebug Features Miscellaneous Features2.3 Software Key Features 2.3.1 AMI* BIOS2.2 Included Hardware and Documentation 2.4 Before You Begin remove any hardware unless the system is unplugged 2.5 Setting Up the Evaluation Boardused when handling the board cables to this product2.6 Configuring the BIOS Figure 1. Intel 945GME Express Chipset Development Kit Block Diagram 3.1 Block Diagram3.0 Theory of Operation 3.4.1 IntelR 945GME GMCH 3.4 System Features and Operation3.2 Mechanical Form Factor 3.3 Thermal Management3.4.1.3 Advanced Graphics and Display Interface 3.4.2 ICH7-M3.4.1.1 System Memory 3.4.1.2 DMI3.4.2.5 ATA / Storage 3.4.2.2 PCI Slots3.4.2.3 On-Board LAN 3.4.2.4 AC’97 and High Definition Audio3.4.2.8 Serial, IrDA 3.4.2.6 USB Connectors3.4.2.9 BIOS Firmware Hub FWH 3.4.2.7 LPC Super I/O SIO/LPC Slot3.4.2.13 Thermal Monitoring 3.4.3 System I/O and Connector Summary3.4.2.11 Clocks 3.4.2.12 Real Time Clock3.4.3.3 IDE Support 3.4.3.5 VGA Connector3.4.3.1 PCI Express* Support 3.4.3.2 SATA Support3.4.4 POST Code Debugger 3.4.3.7 32 bit/33 MHz PCI Connectors3.4.3.8 Ethernet Gigabit LAN Interface connector 3.5 Clock Generation3.6 Power Management States 3.6.3 Transition to S5 3.7 Power Measurement Support3.6.1 Transition to S3 3.6.2 Transition to S4Voltage Groups Powered duringR is the value of the sense resistor typically 0.002 Ω V is the voltage measured across the sense resistorTheory of Operation-Intel 945GME Express Chipset Intel 945GME Express Chipset-Theory of Operation 4.0 Hardware Reference 4.1 Primary FeaturesDesignator Default SettingIntel 945GME Express Chipset-Hardware Reference ReferenceHardware Reference-Intel 945GME Express Chipset 4.2 Back Panel Connectors 4.3 Configuration Settings Supported Configuration Jumper/Switch Settings Sheet 1 of Supported Configuration Jumper/Switch Settings Sheet 2 of 4.4 Power On and Reset Buttons Table 9. Intel 945GME Express Chipset LED Function Legend 4.5 LEDs4.6 Other Headers, Slots, and Sockets 4.6.1 H8 Programming HeadersExpansion Slots and Sockets 4.6.2 Expansion Slots and Sockets4.6.2.1 478 Pin Grid Array Micro-FCPGA Socket H8 Programming JumpersPCI Express* x16 Pinout J6C1 Sheet 1 of 4.6.2.2 PCI ExpressPCI Express* x16 Pinout J6C1 Sheet 2 of Table 12. PCI Express* x16 Pinout J6C1 Sheet 3 of 4.6.2.3 Media Expansion Card MEC SlotMEC Slot J6C1 Sheet 1 of Intel 945GME Express Chipset-Hardware Reference MEC Slot J6C1 Sheet 2 ofMEC Slot J6C1 Sheet 3 of 4.6.2.4 PCI ExpressPCI Express* x1 Pinout J7C1, J8C1 Sheet 1 of Table 14. PCI Express* x1 Pinout J7C1, J8C1 Sheet 2 of 4.6.2.6 SATA Pinout 4.6.2.5 IDE ConnectorIDE Connector J7J1 Table 16. SATA Port 0 Data Connector Pinout J7H1Table 19. Fan Connectors J3F1 and J3C1 4.6.2.7 Fan ConnectorsTable 17. SATA Port 0 Power Connector Pinout J6H3 Table 18. SATA Port 2 Mobile Drive Connector Pinout J8J2Figure 6. Heatsink and Backplate Appendix A Heat Sink Installation InstructionsIntel 945GME Express Chipset-Heat Sink Installation Instructions Figure 7. Backplate PinsFigure 9. Squeezing Activation Arm Figure 8. Applying the Thermal GreaseFigure 10. Installing the Heatsink Figure 11. Plugging in the Fan Figure 12. Completed Assembly