IBM MiEM78P468N, MiEM78P468L manual TCC and WDT Prescaler, Mux

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EM78P468N/EM78P468L

8-Bit Microcontroller

6.3 TCC and WDT Prescaler

Two 8-bit counters are available as prescalers for the TCC (Time Clock Counter) and WDT (Watchdog Timer). The TCCP2~TCCP0 bits of the IOC71 register are used to determine the ratio of the TCC prescaler. Likewise, the WDTP2~WDTP0 bits of the IOC81 register are used to determine the WDT prescaler. The TCC prescaler (TCCP2~TCCP0) is cleared by the instructions each time they are written into TCC, while the WDT prescaler is cleared by the “WDTC” and “SLEP” instructions. Fig.7 depicts the circuit diagram of TCC and WDT.

R1 (TCC) is an 8-bit timer/counter. The clock source of TCC can be selected by internal instruction clock or external signal input (edge selectable from the TCC control register). If the TCC signal source is from the internal instruction clock, the TCC will be incremented by 1 at every instruction cycle (without prescaler). If the TCC signal source is from an external clock input, the TCC will be incremented by 1 at every falling edge or rising edge of the TCC pin.

The Watchdog Timer is a free running on sub-oscillator. The WDT will keep on running even after the oscillator driver has been turned off. During Normal mode, Green mode, or Idle mode operation, a WDT time-out (if enabled) will cause the device to reset. The WDT can be enabled or disabled at any time during the Normal mode and Green mode by software programming. Refer to WDTE bit of IOC81 register. The WDT time-out period is equal to (prescaler ⋅ 256 / (Fs/2)).

Instruction Clock = Fosc /2 Fosc: CPU operate frequency

TCC

Pin

TE (IOC71)

MUX

TS (IOC71)

Prescaler

PSRE TCCP2~0 (IOC71) (IOC71)

Data Bus

TCC (R1)

8 to 1 MUX

TCCoverflow interrupt

Fig. 6-4(a) Block Diagram of TCC

WDT

WDTE (IOC81)

8 bit counter

8 to 1 MUX

WDT Time out

Prescaler

WDTP2~0

(IOC81)

Fs/2

(Fs:Sub oscillator)

Fig. 6-4(b) Block Diagram of WDT

Product Specification (V1.5) 02.15.2007

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(This specification is subject to change without further notice)

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Contents EM78P468N/L Elan Microelectronics Corporation Contents Infrared Remote Control Application/PWM Waveform Generate Doc. Version Revision Description Date AppendixContents Product Specification V1.5 Bit Microcontroller FeaturesGeneral Description Pin QFP Pin Lqfp Pin AssignmentSystem Block Diagram Block DiagramPin Description for Package of QFP64 and LQFP64 Symbol Pin No Type FunctionPin Description SEG11~SEG14 Pin Description for Package of QFP44 and LQFP44Function Description 2 R1/TCC Timer Clock CounterOperational Registers 1 R0/IAR Indirect Addressing RegisterOn-ChipProgrammemory Bits 6 ~ 5 PS1 ~ 0 Page select bits 4 R3/SR Status RegisterBit 2 Z Zero flag Bit 0 C Carry flag6 R5/Port 5 Port 5 I/O Data and Page of Register Select 5 R4/RSR RAM Select Register7 R6/Port 6 Port 6 I/O Data Register 8 R7/Port 7 Port 7 I/O Data Register9 R8/Port 8 Port 8 I/O Data Register Bit 4 Lcden LCD enable bit10 R9/LCDCR LCD Control Register Lcdtype = 0 a type waveform Lcdtype = 1 B type waveformRB/LCDDB LCD Data Buffer RC/CNTER Counter Enable Register11 RA/LCDADDR LCD Address Address 0Dh 14 RD/SBPCR System, Booster and PLL Control RegisterMain clock Example Fs=32.768KAddress 0Eh 15 RE/IRCR IR and Port 5 Setting Control RegisterBit Microcontroller CPU Operation Mode Address 0Fh 16 RF/ISR Interrupt Status RegisterAddress 10h~3Fh R10~R3F General Purpose Register Address 05h, Bit 0 of R5 = Special Purpose RegistersAccumulator 4 IOC70/P7CR Port 7 I/O Control Register 3 IOC60/P6CR Port 6 I/O Control Register5 IOC80/P8CR Port 8 I/O Control Register 6 IOC90/RAMADDR 128 Bytes RAM AddressIOCD0/HPWTPR High-Pulse Width Timer Preset Register IOCB0/CNT1PR Counter 1 Preset RegisterIOCC0/CNT2PR Counter 2 Preset Register Bits 6, 5, 4 Not used IOCE0/LPWTPR Low-Pulse Width Timer Preset RegisterIOCF0/IMR Interrupt Mask Register Bit 7 Intedge 14 IOC71/TCCCR TCC Control RegisterBits 3~0 PSRE, TCCP2 ~ TCCP0 TCC prescaler bits TCC Rate16 IOC91/CNT12CR Counters 1, 2 Control Register 15 IOC81/WDTCR WDT Control RegisterBits 7 ~ 4 Not used WDT RateLow-pulse Width Timer Scale IOCA1/HLPWTCR High/Low Pulse Width Timer Control RegisterHigh-pulse Width Timer Scale Counter 1 ScaleIOCC1/P6OD Port 6 Open Drain Control Register IOCB1/P6PH Port 6 Pull-high Control RegisterIOCD1/P8PH Port 8 Pull High Control Register IOCE1/P6PL Port 6 Pull Low Control RegisterMUX TCC and WDT PrescalerTCC Setting Flowchart Bit Microcontroller WDT Setting FlowchartI/O Ports Reset and Wake-upBit Microcontroller Summary of Registers Initialized Values Address Name Reset Type BitINT Psre TCCP2 TCCP1 TCCP0 Name Reset Type Bit Wake-up Signal Sleep Mode Idle Mode Green Mode Normal Mode Oscillator Modes Phase Lock Loop PLL ModeOscillator Oscillator Source Oscillator Type Frequency C1 pF C2 pF Crystal Oscillator/Ceramic Resonators CrystalMain clock Example Fs=32.768KHz RC Oscillator Mode with Internal Capacitor Power-on ConsiderationsRC Oscillator Frequencies Pin Rext Average Fosc 5V, 25 C Average Fosc 3V, 25 CResidue-Voltage Protection External Power-on Reset Circuit13 Interrupt Back-up InterruptBits 6 ~ 5 DS1 ~ DS0 LCD duty select LCD Driver1 R9/LCDCR LCD Control Register 3 RB/LCDDB LCD Data Buffer 2 RA/LCDADDR LCD AddressBits 7 ~ 5 Not used, fixed to Bits 4 ~ 0 LCDA4 ~ LCDA0 LCD RAM addressBit 2 ~ 1 BF1 ~ 0 LCD booster frequency select bits 4 RD/SBPCR System, Booster and PLL Control RegistersExternal circuit for 1/2 Bias Boosting circuits connection for LCD voltageExternal circuit for 1/3 Bias 16 LCD Waveform for 1/2 Bias, 1/2 Duty 18 LCD Waveform for 1/3 Bias, 1/3 Duty ⋅ 1 + decimal C ounter Preset Value Iocc 0 ⋅ prescaler Infrared Remote Control Application/PWM Waveform Generate21 LGP=0, Irout Pin Output Waveform 23 LGP=0, Irout Pin Output Waveform IR application Bit Microcontroller IR/PWM Function Enable FlowchartBits 12 ~ 10 Not used Code OptionsWord Bits12~10 WordPR1PR0Protect Instruction SetBits 2~0 PR2~PR0 Protect Bit Convention Binary Instruction Hex Mnemonic Operation StatusJZA Binary Instruction Hex Mnemonic Operation Status AffectedAC Test Input/Output Waveform Timing DiagramAbsolute Maximum Ratings Items Symbol Condition Rating Min Max UnitDC Electrical Characteristics Electrical CharacteristicSymbol Parameter Condition Min Typ Max Unit Ta= -40 C ~85 C, VDD= 5.0V, GND=Ta= -40C ~85 C, VDD= 3.0V, GND= Ta=- 40C ~ 85 C, VDD=5V±5%, GND=0V AC Electrical CharacteristicsSymbol Parameter Conditions Min Typ Max Unit Vih/Vil /RESET pins with schmitt inverter Device CharacteristicVih/Vil Port 7, Port 8 All Input pins with schmitt inverter P5.7 Voh/Ioh VDD=5V, IROCS=1 P5.7 Voh/Ioh VDD=3V, IROCS=1 80 P5.7 Voh/Ioh VDD=5V, IROCS=0 Max Typ +25 Setup time from Power on Reset = 51 K 13 Typical Eric OSC Frequency vs. Temperature Xin Pin VDD=5V Typical ICC2 vs. Temerature Typical ICC1 vs. Temerature Typical ISB vs. Temerature 22 Operating Voltage under Temperature Range of 0C to 70C Application Circuit EM78P468NxS/xJ Package TypeName Package Type Pin Count Package Size QFP Package Information900 100 BSC 00 REF LqfpMin Normal Max 30TYP 15TYP Program Pin Name IC Pin Name QFP-64 QFP-44 Wiring diagram is for Elan DwtrEM78P468N/L Program Pin List Main oscillator PLL mode, Sub oscillator Crystal mode Main oscillator Crystal mode, Sub oscillator Crystal modeICE 468XA Oscillator Circuit JP Main oscillator RC mode, Sub oscillator CrystalBit Microcontroller VLCD3 GND Osco ICE 468XA Output Pin Assignment JPTest Category Test Conditions Quality Assurance and ReliabilityAddress Trap Detect Contents III

MiEM78P468L, MiEM78P468N specifications

The IBM MiEM78P468N and MiEM78P468L are advanced integrated circuit solutions that cater primarily to the needs of enterprise-level computing systems. These microprocessors are integral in handling a variety of complex tasks, thereby empowering businesses with the efficiency and speed required in today's fast-paced digital environment.

Both models utilize the cutting-edge 78P architecture, which provides impressive performance capabilities. The MiEM78P468N operates at a clock speed of up to 2.2 GHz, while the MiEM78P468L offers a lower clock speed optimized for energy efficiency. This distinction makes the N version ideal for high-performance applications, whereas the L version appeals to scenarios where power consumption is a critical consideration.

A key characteristic of both models is their multi-core architecture, supporting up to four cores. This feature allows for enhanced parallel processing, enabling the handling of multiple tasks simultaneously—a vital requirement for data-intensive applications. Moreover, the inclusion of advanced cache memory arrangements enhances data retrieval speeds significantly, ensuring that applications run smoothly without performance bottlenecks.

These processors also employ cutting-edge thermal management technologies. The dynamic voltage and frequency scaling (DVFS) capabilities ensure that performance can be adjusted in real-time based on workload requirements, helping to minimize energy consumption. This is particularly beneficial in maintaining optimal operating temperatures and prolonging the lifespan of the hardware.

Another notable feature is support for advanced security protocols. Both models incorporate hardware-based security technologies that safeguard data integrity and protect against unauthorized access. This is becoming increasingly important in today's cybersecurity landscape where businesses must prioritize protecting sensitive information.

Additionally, the IBM MiEM78P468N and MiEM78P468L processors are compatible with a wide range of operating systems, facilitating seamless integration into various IT environments. Their robust architecture supports extensive peripheral interconnect protocols, enhancing expandability and connectivity options.

In summary, the IBM MiEM78P468N and MiEM78P468L processors stand out for their performance capabilities, energy efficiency, advanced security features, and versatility. They are well-suited for organizations looking to enhance their computing power while maintaining a balance between performance and power consumption. These microprocessors are instrumental in driving innovation and efficiency in enterprise computing.
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