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Contents
Contents
1General Description ······················································································ 1
2Features ········································································································· 1
3Pin Assignment ····························································································· 2
4Block Diagram······························································································· 3
5Pin Description······························································································ 4
6Function Description ···················································································· 6
6.1 Operational Registers | 6 |
6.1.1 | R0/IAR (Indirect Addressing Register) | 6 |
6.1.2 | R1/TCC (Timer Clock Counter) | 6 |
6.1.3 | R2/PC (Program Counter) | 6 |
6.1.4 | R3/SR (Status Register) | 8 |
6.1.5 | R4/RSR (RAM Select Register) | 9 |
6.1.6 | R5/Port 5 (Port 5 I/O Data and Page of Register Select | 9 |
6.1.7 | R6/Port 6 (Port 6 I/O Data Register) | 9 |
6.1.8 | R7/Port 7 (Port 7 I/O Data Register) | 9 |
6.1.9 | R8/Port 8 (Port 8 I/O Data Register) | 10 |
6.1.10 | R9/LCDCR (LCD Control Register) | 10 |
6.1.11 | RA/LCD_ADDR (LCD Address) | 11 |
6.1.12 | RB/LCD_DB (LCD Data Buffer) | 11 |
6.1.13 | RC/CNTER (Counter Enable Register) | 11 |
6.1.14 | RD/SBPCR (System, Booster and PLL Control Register) | 12 |
6.1.15 | RE/IRCR (IR and Port 5 Setting Control Register) | 13 |
6.1.16 | RF/ISR (Interrupt Status Register) | 14 |
6.1.17 | Address: 10h~3Fh; R10~R3F (General Purpose Register) | 14 |
6.2 Special Purpose Registers | 15 |
6.2.1 | A (Accumulator) | 15 |
6.2.2 | IOC50/P5CR (Port 5 I/O and Ports 7, 8 for LCD Segment Control Register) .. | 15 |
6.2.3 | IOC60/P6CR (Port 6 I/O Control Register) | 16 |
6.2.4 | IOC70/P7CR (Port 7 I/O Control Register) | 16 |
6.2.5 | IOC80/P8CR (Port 8 I/O Control Register) | 16 |
6.2.6 | IOC90/RAM_ADDR (128 Bytes RAM Address) | 16 |
6.2.7 | IOCA0/RAM_DB (128 Bytes RAM Data Buffer) | 16 |
6.2.8 | IOCB0/CNT1PR (Counter 1 Preset Register) | 17 |
6.2.9 | IOCC0/CNT2PR (Counter 2 Preset Register) | 17 |
6.2.10 | IOCD0/HPWTPR (High-Pulse Width Timer Preset Register) | 17 |
6.2.11 | IOCE0/LPWTPR (Low-Pulse Width Timer Preset Register) | 18 |
6.2.12 | IOCF0/IMR (Interrupt Mask Register) | 18 |
6.2.13 | IOC61/WUCR (Wake-up and Sink Current of P5.7/IROUT Control Register) . 18 |
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Product Specification (V1.5) 02.15.2007 | • iii |
Contents
EM78P468N/L
Elan Microelectronics Corporation
Contents
Infrared Remote Control Application/PWM Waveform Generate
Doc. Version Revision Description Date
Appendix
Contents Product Specification V1.5
Features
General Description
Bit Microcontroller
Pin QFP Pin Lqfp
Pin Assignment
System Block Diagram
Block Diagram
Symbol Pin No Type Function
Pin Description
Pin Description for Package of QFP64 and LQFP64
SEG11~SEG14
Pin Description for Package of QFP44 and LQFP44
1 R0/IAR Indirect Addressing Register
2 R1/TCC Timer Clock Counter
Function Description
Operational Registers
On-ChipProgrammemory
Bit 0 C Carry flag
4 R3/SR Status Register
Bits 6 ~ 5 PS1 ~ 0 Page select bits
Bit 2 Z Zero flag
8 R7/Port 7 Port 7 I/O Data Register
5 R4/RSR RAM Select Register
6 R5/Port 5 Port 5 I/O Data and Page of Register Select
7 R6/Port 6 Port 6 I/O Data Register
Lcdtype = 0 a type waveform Lcdtype = 1 B type waveform
Bit 4 Lcden LCD enable bit
9 R8/Port 8 Port 8 I/O Data Register
10 R9/LCDCR LCD Control Register
RC/CNTER Counter Enable Register
11 RA/LCDADDR LCD Address
RB/LCDDB LCD Data Buffer
Example Fs=32.768K
14 RD/SBPCR System, Booster and PLL Control Register
Address 0Dh
Main clock
15 RE/IRCR IR and Port 5 Setting Control Register
Bit Microcontroller CPU Operation Mode
Address 0Eh
16 RF/ISR Interrupt Status Register
Address 10h~3Fh R10~R3F General Purpose Register
Address 0Fh
Special Purpose Registers
Accumulator
Address 05h, Bit 0 of R5 =
6 IOC90/RAMADDR 128 Bytes RAM Address
3 IOC60/P6CR Port 6 I/O Control Register
4 IOC70/P7CR Port 7 I/O Control Register
5 IOC80/P8CR Port 8 I/O Control Register
IOCB0/CNT1PR Counter 1 Preset Register
IOCC0/CNT2PR Counter 2 Preset Register
IOCD0/HPWTPR High-Pulse Width Timer Preset Register
IOCE0/LPWTPR Low-Pulse Width Timer Preset Register
IOCF0/IMR Interrupt Mask Register
Bits 6, 5, 4 Not used
TCC Rate
14 IOC71/TCCCR TCC Control Register
Bit 7 Intedge
Bits 3~0 PSRE, TCCP2 ~ TCCP0 TCC prescaler bits
WDT Rate
15 IOC81/WDTCR WDT Control Register
16 IOC91/CNT12CR Counters 1, 2 Control Register
Bits 7 ~ 4 Not used
Counter 1 Scale
IOCA1/HLPWTCR High/Low Pulse Width Timer Control Register
Low-pulse Width Timer Scale
High-pulse Width Timer Scale
IOCE1/P6PL Port 6 Pull Low Control Register
IOCB1/P6PH Port 6 Pull-high Control Register
IOCC1/P6OD Port 6 Open Drain Control Register
IOCD1/P8PH Port 8 Pull High Control Register
MUX
TCC and WDT Prescaler
TCC Setting Flowchart
Bit Microcontroller WDT Setting Flowchart
I/O Ports
Reset and Wake-up
Bit Microcontroller Summary of Registers Initialized Values
Address Name Reset Type Bit
INT Psre TCCP2 TCCP1 TCCP0
Name Reset Type Bit
Wake-up Signal Sleep Mode Idle Mode Green Mode Normal Mode
Phase Lock Loop PLL Mode
Oscillator
Oscillator Modes
Crystal Oscillator/Ceramic Resonators Crystal
Main clock Example Fs=32.768KHz
Oscillator Source Oscillator Type Frequency C1 pF C2 pF
Pin Rext Average Fosc 5V, 25 C Average Fosc 3V, 25 C
Power-on Considerations
RC Oscillator Mode with Internal Capacitor
RC Oscillator Frequencies
Residue-Voltage Protection
External Power-on Reset Circuit
13 Interrupt Back-up
Interrupt
LCD Driver
1 R9/LCDCR LCD Control Register
Bits 6 ~ 5 DS1 ~ DS0 LCD duty select
Bits 4 ~ 0 LCDA4 ~ LCDA0 LCD RAM address
2 RA/LCDADDR LCD Address
3 RB/LCDDB LCD Data Buffer
Bits 7 ~ 5 Not used, fixed to
Bit 2 ~ 1 BF1 ~ 0 LCD booster frequency select bits
4 RD/SBPCR System, Booster and PLL Control Registers
Boosting circuits connection for LCD voltage
External circuit for 1/3 Bias
External circuit for 1/2 Bias
16 LCD Waveform for 1/2 Bias, 1/2 Duty
18 LCD Waveform for 1/3 Bias, 1/3 Duty
⋅ 1 + decimal C ounter Preset Value Iocc 0 ⋅ prescaler
Infrared Remote Control Application/PWM Waveform Generate
21 LGP=0, Irout Pin Output Waveform
23 LGP=0, Irout Pin Output Waveform
IR application
Bit Microcontroller IR/PWM Function Enable Flowchart
Bits12~10 Word
Code Options
Bits 12 ~ 10 Not used
Word
Instruction Set
Bits 2~0 PR2~PR0 Protect Bit
PR1PR0Protect
Convention
Binary Instruction Hex Mnemonic Operation Status
JZA
Binary Instruction Hex Mnemonic Operation Status Affected
AC Test Input/Output Waveform
Timing Diagram
Absolute Maximum Ratings
Items Symbol Condition Rating Min Max Unit
Ta= -40 C ~85 C, VDD= 5.0V, GND=
Electrical Characteristic
DC Electrical Characteristics
Symbol Parameter Condition Min Typ Max Unit
Ta= -40C ~85 C, VDD= 3.0V, GND=
AC Electrical Characteristics
Symbol Parameter Conditions Min Typ Max Unit
Ta=- 40C ~ 85 C, VDD=5V±5%, GND=0V
Vih/Vil /RESET pins with schmitt inverter
Device Characteristic
Vih/Vil Port 7, Port 8 All Input pins with schmitt inverter
P5.7 Voh/Ioh VDD=5V, IROCS=1 P5.7 Voh/Ioh VDD=3V, IROCS=1
80 P5.7 Voh/Ioh VDD=5V, IROCS=0 Max Typ +25
Setup time from Power on Reset
= 51 K
13 Typical Eric OSC Frequency vs. Temperature Xin Pin
VDD=5V
Typical ICC2 vs. Temerature
Typical ICC1 vs. Temerature
Typical ISB vs. Temerature
22 Operating Voltage under Temperature Range of 0C to 70C
Application Circuit
Package Type
Name Package Type Pin Count Package Size
EM78P468NxS/xJ
QFP
Package Information
900 100 BSC 00 REF
Lqfp
Min Normal Max 30TYP 15TYP
Wiring diagram is for Elan Dwtr
EM78P468N/L Program Pin List
Program Pin Name IC Pin Name QFP-64 QFP-44
Main oscillator RC mode, Sub oscillator Crystal
Main oscillator Crystal mode, Sub oscillator Crystal mode
Main oscillator PLL mode, Sub oscillator Crystal mode
ICE 468XA Oscillator Circuit JP
Bit Microcontroller
VLCD3 GND Osco
ICE 468XA Output Pin Assignment JP
Quality Assurance and Reliability
Address Trap Detect
Test Category Test Conditions
Contents III