IBM MiEM78P468N, MiEM78P468L manual Binary Instruction Hex Mnemonic Operation Status, Convention

Page 53

EM78P468N/EM78P468L

8-Bit Microcontroller

Convention:

R = Register designator that specifies which one of the registers (including operation and general purpose registers) is to be utilized by the instruction.

b = Bit field designator that selects the value for the bit located in the register R and which affects the operation.

k = 8 or 10-bit constant or literal value

 

Binary Instruction

 

Hex

 

Mnemonic

 

 

Operation

 

Status

 

 

 

 

 

 

 

Affected

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0

0000

0000

0000

 

0000

 

NOP

 

 

 

No Operation

None

0

0000

0000

0001

 

0001

 

DAA

 

 

 

Decimal Adjust A

C

0

0000

0000

0010

 

0002

 

CONTW

 

 

 

A → CONT

None

0

0000

0000

0011

 

0003

 

SLEP

 

 

 

0 → WDT, Stop

T, P

 

 

 

 

 

oscillator

 

 

 

 

 

 

 

 

 

 

 

 

 

0

0000

0000

0100

 

0004

 

WDTC

 

 

 

0 → WDT

T, P

0

0000

0000

rrrr

 

000r

 

IOW

R

 

 

A → IOCR

None 1

0

0000

0001

0000

 

0010

 

ENI

 

 

 

Enable Interrupt

None

0

0000

0001

0001

 

0011

 

DISI

 

 

 

Disable Interrupt

None

0

0000

0001

0010

 

0012

 

RET

 

 

 

[Top of Stack] → PC

None

0

0000

0001

0011

 

0013

 

RETI

 

 

 

[Top of Stack] → PC,

None

 

 

 

 

 

Enable Interrupt

 

 

 

 

 

 

 

 

 

 

 

None 1

0

0000

0001

rrrr

 

001r

 

IOR

R

 

 

IOCR → A

0

0000

01rr

rrrr

 

00rr

 

MOV

R,

A

 

A → R

None

0

0000

1000

0000

 

0080

 

CLRA

 

 

 

0 → A

Z

0

0000

11rr

rrrr

 

00rr

 

CLR

R

 

 

0 → R

Z

0

0001

00rr

rrrr

 

01rr

 

SUB

A,

R

 

R-A → A

Z,C,DC

0

0001

01rr

rrrr

 

01rr

 

SUB

R,

A

 

R-A → R

Z,C,DC

0

0001

10rr

rrrr

 

01rr

 

DECA

R

 

 

R-1 → A

Z

0

0001

11rr

rrrr

 

01rr

 

DEC

R

 

 

R-1 → R

Z

0

0010

00rr

rrrr

 

02rr

 

OR

A,

R

 

A ∨ R → A

Z

0

0010

01rr

rrrr

 

02rr

 

OR

R,

A

 

A ∨ R → R

Z

0

0010

10rr

rrrr

 

02rr

 

AND

A,

R

 

A & R → A

Z

0

0010

11rr

rrrr

 

02rr

 

AND

R,

A

 

A & R → R

Z

0

0011

00rr

rrrr

 

03rr

 

XOR

A,

R

 

A ⊕ R → A

Z

0

0011

01rr

rrrr

 

03rr

 

XOR

R,

A

 

A ⊕ R → R

Z

0

0011

10rr

rrrr

 

03rr

 

ADD

A,

R

 

A + R → A

Z,C,DC

0

0011

11rr

rrrr

 

03rr

 

ADD

R,

A

 

A + R → R

Z,C,DC

0

0100

00rr

rrrr

 

04rr

 

MOV

A,

R

 

R → A

Z

0

0100

01rr

rrrr

 

04rr

 

MOV

R,

R

 

R → R

Z

0

0100

10rr

rrrr

 

04rr

 

COMA

R

 

 

/R → A

Z

0

0100

11rr

rrrr

 

04rr

 

COM

R

 

 

/R → R

Z

0

0101

00rr

rrrr

 

05rr

 

INCA

R

 

 

R+1 → A

Z

0

0101

01rr

rrrr

 

05rr

 

INC

R

 

 

R+1 → R

Z

0

0101

10rr

rrrr

 

05rr

 

DJZA

R

 

 

R-1 → A, skip if zero

None

0

0101

11rr

rrrr

 

05rr

 

DJZ

R

 

 

R-1 → R, skip if zero

None

Product Specification (V1.5) 02.15.2007

• 47

(This specification is subject to change without further notice)

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Page 52 Page 54
Contents EM78P468N/L Elan Microelectronics Corporation Contents Infrared Remote Control Application/PWM Waveform Generate Doc. Version Revision Description Date AppendixContents Product Specification V1.5 Bit Microcontroller FeaturesGeneral Description Pin QFP Pin Lqfp Pin AssignmentSystem Block Diagram Block DiagramPin Description for Package of QFP64 and LQFP64 Symbol Pin No Type FunctionPin Description SEG11~SEG14 Pin Description for Package of QFP44 and LQFP44Function Description 2 R1/TCC Timer Clock CounterOperational Registers 1 R0/IAR Indirect Addressing RegisterOn-ChipProgrammemory Bits 6 ~ 5 PS1 ~ 0 Page select bits 4 R3/SR Status RegisterBit 2 Z Zero flag Bit 0 C Carry flag6 R5/Port 5 Port 5 I/O Data and Page of Register Select 5 R4/RSR RAM Select Register7 R6/Port 6 Port 6 I/O Data Register 8 R7/Port 7 Port 7 I/O Data Register9 R8/Port 8 Port 8 I/O Data Register Bit 4 Lcden LCD enable bit10 R9/LCDCR LCD Control Register Lcdtype = 0 a type waveform Lcdtype = 1 B type waveformRB/LCDDB LCD Data Buffer RC/CNTER Counter Enable Register11 RA/LCDADDR LCD Address Address 0Dh 14 RD/SBPCR System, Booster and PLL Control RegisterMain clock Example Fs=32.768KAddress 0Eh 15 RE/IRCR IR and Port 5 Setting Control RegisterBit Microcontroller CPU Operation Mode Address 0Fh 16 RF/ISR Interrupt Status RegisterAddress 10h~3Fh R10~R3F General Purpose Register Address 05h, Bit 0 of R5 = Special Purpose RegistersAccumulator 4 IOC70/P7CR Port 7 I/O Control Register 3 IOC60/P6CR Port 6 I/O Control Register5 IOC80/P8CR Port 8 I/O Control Register 6 IOC90/RAMADDR 128 Bytes RAM AddressIOCD0/HPWTPR High-Pulse Width Timer Preset Register IOCB0/CNT1PR Counter 1 Preset RegisterIOCC0/CNT2PR Counter 2 Preset Register Bits 6, 5, 4 Not used IOCE0/LPWTPR Low-Pulse Width Timer Preset RegisterIOCF0/IMR Interrupt Mask Register Bit 7 Intedge 14 IOC71/TCCCR TCC Control RegisterBits 3~0 PSRE, TCCP2 ~ TCCP0 TCC prescaler bits TCC Rate16 IOC91/CNT12CR Counters 1, 2 Control Register 15 IOC81/WDTCR WDT Control RegisterBits 7 ~ 4 Not used WDT RateLow-pulse Width Timer Scale IOCA1/HLPWTCR High/Low Pulse Width Timer Control RegisterHigh-pulse Width Timer Scale Counter 1 ScaleIOCC1/P6OD Port 6 Open Drain Control Register IOCB1/P6PH Port 6 Pull-high Control RegisterIOCD1/P8PH Port 8 Pull High Control Register IOCE1/P6PL Port 6 Pull Low Control RegisterMUX TCC and WDT PrescalerTCC Setting Flowchart Bit Microcontroller WDT Setting FlowchartI/O Ports Reset and Wake-upBit Microcontroller Summary of Registers Initialized Values Address Name Reset Type BitINT Psre TCCP2 TCCP1 TCCP0 Name Reset Type Bit Wake-up Signal Sleep Mode Idle Mode Green Mode Normal Mode Oscillator Modes Phase Lock Loop PLL ModeOscillator Oscillator Source Oscillator Type Frequency C1 pF C2 pF Crystal Oscillator/Ceramic Resonators CrystalMain clock Example Fs=32.768KHz RC Oscillator Mode with Internal Capacitor Power-on ConsiderationsRC Oscillator Frequencies Pin Rext Average Fosc 5V, 25 C Average Fosc 3V, 25 CResidue-Voltage Protection External Power-on Reset Circuit13 Interrupt Back-up InterruptBits 6 ~ 5 DS1 ~ DS0 LCD duty select LCD Driver1 R9/LCDCR LCD Control Register 3 RB/LCDDB LCD Data Buffer 2 RA/LCDADDR LCD AddressBits 7 ~ 5 Not used, fixed to Bits 4 ~ 0 LCDA4 ~ LCDA0 LCD RAM addressBit 2 ~ 1 BF1 ~ 0 LCD booster frequency select bits 4 RD/SBPCR System, Booster and PLL Control RegistersExternal circuit for 1/2 Bias Boosting circuits connection for LCD voltageExternal circuit for 1/3 Bias 16 LCD Waveform for 1/2 Bias, 1/2 Duty 18 LCD Waveform for 1/3 Bias, 1/3 Duty ⋅ 1 + decimal C ounter Preset Value Iocc 0 ⋅ prescaler Infrared Remote Control Application/PWM Waveform Generate21 LGP=0, Irout Pin Output Waveform 23 LGP=0, Irout Pin Output Waveform IR application Bit Microcontroller IR/PWM Function Enable FlowchartBits 12 ~ 10 Not used Code OptionsWord Bits12~10 WordPR1PR0Protect Instruction SetBits 2~0 PR2~PR0 Protect Bit Convention Binary Instruction Hex Mnemonic Operation StatusJZA Binary Instruction Hex Mnemonic Operation Status AffectedAC Test Input/Output Waveform Timing DiagramAbsolute Maximum Ratings Items Symbol Condition Rating Min Max UnitDC Electrical Characteristics Electrical CharacteristicSymbol Parameter Condition Min Typ Max Unit Ta= -40 C ~85 C, VDD= 5.0V, GND=Ta= -40C ~85 C, VDD= 3.0V, GND= Ta=- 40C ~ 85 C, VDD=5V±5%, GND=0V AC Electrical CharacteristicsSymbol Parameter Conditions Min Typ Max Unit Vih/Vil /RESET pins with schmitt inverter Device CharacteristicVih/Vil Port 7, Port 8 All Input pins with schmitt inverter P5.7 Voh/Ioh VDD=5V, IROCS=1 P5.7 Voh/Ioh VDD=3V, IROCS=1 80 P5.7 Voh/Ioh VDD=5V, IROCS=0 Max Typ +25 Setup time from Power on Reset = 51 K 13 Typical Eric OSC Frequency vs. Temperature Xin Pin VDD=5V Typical ICC2 vs. Temerature Typical ICC1 vs. Temerature Typical ISB vs. Temerature 22 Operating Voltage under Temperature Range of 0C to 70C Application Circuit EM78P468NxS/xJ Package TypeName Package Type Pin Count Package Size QFP Package Information900 100 BSC 00 REF LqfpMin Normal Max 30TYP 15TYP Program Pin Name IC Pin Name QFP-64 QFP-44 Wiring diagram is for Elan DwtrEM78P468N/L Program Pin List Main oscillator PLL mode, Sub oscillator Crystal mode Main oscillator Crystal mode, Sub oscillator Crystal modeICE 468XA Oscillator Circuit JP Main oscillator RC mode, Sub oscillator CrystalBit Microcontroller VLCD3 GND Osco ICE 468XA Output Pin Assignment JPTest Category Test Conditions Quality Assurance and ReliabilityAddress Trap Detect Contents III

MiEM78P468L, MiEM78P468N specifications

The IBM MiEM78P468N and MiEM78P468L are advanced integrated circuit solutions that cater primarily to the needs of enterprise-level computing systems. These microprocessors are integral in handling a variety of complex tasks, thereby empowering businesses with the efficiency and speed required in today's fast-paced digital environment.

Both models utilize the cutting-edge 78P architecture, which provides impressive performance capabilities. The MiEM78P468N operates at a clock speed of up to 2.2 GHz, while the MiEM78P468L offers a lower clock speed optimized for energy efficiency. This distinction makes the N version ideal for high-performance applications, whereas the L version appeals to scenarios where power consumption is a critical consideration.

A key characteristic of both models is their multi-core architecture, supporting up to four cores. This feature allows for enhanced parallel processing, enabling the handling of multiple tasks simultaneously—a vital requirement for data-intensive applications. Moreover, the inclusion of advanced cache memory arrangements enhances data retrieval speeds significantly, ensuring that applications run smoothly without performance bottlenecks.

These processors also employ cutting-edge thermal management technologies. The dynamic voltage and frequency scaling (DVFS) capabilities ensure that performance can be adjusted in real-time based on workload requirements, helping to minimize energy consumption. This is particularly beneficial in maintaining optimal operating temperatures and prolonging the lifespan of the hardware.

Another notable feature is support for advanced security protocols. Both models incorporate hardware-based security technologies that safeguard data integrity and protect against unauthorized access. This is becoming increasingly important in today's cybersecurity landscape where businesses must prioritize protecting sensitive information.

Additionally, the IBM MiEM78P468N and MiEM78P468L processors are compatible with a wide range of operating systems, facilitating seamless integration into various IT environments. Their robust architecture supports extensive peripheral interconnect protocols, enhancing expandability and connectivity options.

In summary, the IBM MiEM78P468N and MiEM78P468L processors stand out for their performance capabilities, energy efficiency, advanced security features, and versatility. They are well-suited for organizations looking to enhance their computing power while maintaining a balance between performance and power consumption. These microprocessors are instrumental in driving innovation and efficiency in enterprise computing.
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