Quatech ESC-100 user manual Clock Rate Multiplier, RR1 RR0

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4.4.2 Clock Rate Multiplier

A standard RS-232 serial port operates at a clock speed of 1.8432 MHz. In order to achieve higher data rates, Quatech Enhanced Serial Adapters can operate at two times, four times, or even eight times this standard clock speed. This is controlled by the clock rate multiplier bits in the Options Register.

Software can determine the UART clock frequency by reading the clock rate multiplier bits RR1 and RR0 in the Options Register as shown in Figure 11. RR1 and RR0 can be set by writing to the Options Register if the X2, X4, and X8 jumpers (J1-J3) are all removed. If one of these jumpers is applied, the RR1 and RR0 bits are forced to the appropriate value. Reading the Options Register will always return the clock rate multiplier at which the board is operating.

RR1

RR0

Clock Rate

UART Clock

Maximum Data

Multiplier

Frequency

Rate

 

 

0

0

X1

1.8432 MHz

115.2 kbaud

(default)

 

 

 

 

0

1

X2

3.6864 MHz

230.4 kbaud

1

0

X4

7.3728 MHz

460.8 kbaud

1

1

X8

14.7456 MHz

921.6 kbaud

Figure 11 --- Rate Register bit definition

At powerup and reset, the Options Register is initialized to 0. The ESC-100 will thus powerup in the x1 mode with software control of the clock rate multiplier enabled as long as the X2, X4, and X8 jumpers are not installed.

Software can control high baud rates through a combination of changing the clock rate multiplier and the UART baud rate divisor. For example, a baud rate of

230.4kbps could be achieved by setting the clock rate multiplier to X2 mode (or by applying the X2 jumper) and setting a software application for 115.2 kbps.

Quatech ESC-100 User's Manual

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Contents ESC-100 Warranty Information Page Declaration of Conformity Enhanced Serial Adapter Identification Address Map and Special RegistersBase Address and Interrupt Level IRQ Viewing Resources with Device ManagerConnector Type General InformationFeatures IND Option --- Surge Suppression UpgradeEnable Scratchpad Register SPAD, J4 Hardware ConfigurationFactory Default Configuration Force High-Speed Uart Clock X2, X4, or X8, J1-J3 Clock multiplier jumper optionsHardware Installation Jumper/connector locationsPort Address Range Enabling the Special Registers Interrupt Status RegisterOptions Register Bit Name DescriptionClock Rate Multiplier RR1 RR0Windows Configuration Windows MillenniumWindows Windows Windows Windows NT Viewing Resources with Device Manager Page DOS and Other Operating Systems DOS and other operating systemsQTPCI.EXE Basic Mode display QTPCI.EXE Expert Mode display OS/2 External Connections ESC-100D Channel Output Configuration ESC-100D Connector PinoutsESC-100D Output Connectors CTS DSR ESC-100M only PCI Resource Map INTA#10Specifications Maximum Load pF Data Rate 10% 15% 20% 25% Kbaud Trans Time Troubleshooting Computer will not boot upESC-100D/M Revision March