Quatech ESC-100 Address Map and Special Registers, Base Address and Interrupt Level IRQ

2.3 Force High-Speed UART Clock (X2, X4, or X8, J1-J3)

2.2 Enable Scratchpad Register (SPAD, J4)

2.1 Factory Default Configuration

1.2.1 "IND" Option --- Surge Suppression Upgrade

1.1 Connector Type

1 General Information

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. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

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2 Hardware Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

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3 Hardware Installation		11
4 Address Map and Special Registers		12
4.1	Base Address and Interrupt Level (IRQ)	12
4.2	Enabling the Special Registers	13
4.3	Interrupt Status Register	13
4.4	Options Register	14
4.4.1 Enhanced Serial Adapter Identification		14
4.4.2 Clock Rate Multiplier		15
5 Windows Configuration		16
5.1	Windows Millennium	16
5.2	Windows 2000	17
5.3	Windows 98	18
5.4	Windows 1995	19
5.5 Windows NT		20
5.6	Viewing Resources with Device Manager	20
6 DOS and Other Operating Systems		23
6.1	DOS and other operating systems	23
6.1.1 QTPCI.EXE		23
7 OS/2		26
8 External Connections		27
8.1	ESC-100D Channel Output Configuration	28
8.2	ESC-100M Channel Output Configuration	30
9 PCI Resource Map		32
10 Specifications		33
11 Troubleshooting		35