Texas Instruments MSP-FET430 manual Design Considerations for In-Circuit Programming

Page 37

Design Considerations for In-Circuit Programming

3.5Signal Connections for In-System Programming and Debugging, MSP- FETP430IF, MSP-FET430UIF

With the proper connections, you can use the C-SPY debugger and an FET hardware JTAG interface such as the MSP-FETP430IF and MSP-FET430UIF to program and debug code on your own target board. In addition, the connections will support the GANG430 or PRGS430, thus providing an easy way to program prototype boards, if desired.

Figure 3-2 below shows the connections between the FET Interface module and the target device required to support in-system programming and debugging using C-SPY. The figure shows a 14-pin connected to the MSP430. With this header mounted on your target board, the FET Interface module can be plugged directly into your target. Then simply use C-SPY as you would normally to program and debug.

The connections for the FET Interface module and the GANG430 or PRGS430 are identical. Both the FET Interface module and GANG430 can supply VCC to your target board (via pin 2). In addition, the FET Interface module and GANG430 have a VCC-sense feature that, if used, requires an alternate connection (pin 4 instead of pin 2). The VCC-sense feature senses the local VCC (present on the target board, i.e., a battery or other ‘local’ power supply) and adjusts the output signals accordingly. If the target board is to be powered by a local VCC, then the connection to pin 4 on the JTAG should be made, and not the connection to pin 2. This utilizes the VCC-sense feature and prevents any contention that might occur if the local on-board VCC were connected to the VCC supplied from the FET Interface module or the GANG430. If the VCC-sense feature is not necessary (i.e., the target board is to be powered from the FET Interface module or the GANG430) the VCC connection is made to pin 2 on the JTAG header and no connection is made to pin 4. Figure 3-2 shows a jumper block in use. The jumper block supports both scenarios of supplying VCC to the target board. If this flexibility is not required, the desired VCC connections may be hard-wired eliminating the jumper block.

3-7

Image 37
Contents 2004 Users GuideImportant Notice Page July Read This First How to Use This ManualAbout This Manual Related Documentation From Texas Instruments Information About Cautions and WarningsFCC Warning If You Need AssistancePage Contents Frequently Asked Questions Tables FiguresPage Topic Get Started NowKit Contents, MSP-FET430X110 Software Installation Kit Contents, MSP-FET430UIFHardware Installation, MSP-FET430X110 Flashing the LED Hardware Installation, USB-IF, MSP-FET430UIFGet Started Now Important MSP430 Documents on the CD-ROM and WEB Development Flow Overview Using KickstartOUTPUT-OUTPUT FILE-EXECUTABLE Project SettingsFactory Settings Creating a Project from Scratch Stack Management within the .xcl Files Using an Existing IAR V1.x/V2.x ProjectOverview of Example Programs How to Generate Texas Instrument .TXT and other format FilesDevelopment Flow Using Breakpoints Using C-SPYBreakpoint Types Using Single Step Using Watch Windows Page Design Considerations for In-Circuit Programming External Power Bootstrap LoaderDesign Considerations for In-Circuit Programming PRGS430 Device SignalsDesign Considerations for In-Circuit Programming Signal connections for MSP-FET430X110 Design Considerations for In-Circuit Programming Jtag Signal Connections Frequently Asked Questions Hardware Program Development Assembler, C-Compiler, Linker Should Done or Not Return Omit OPTIONS-FET DEBUGGER-CONNECTIONS Debugging C-SPYFrequently Asked Questions Figure A-1. Modification to FET Interface module Frequently Asked Questions Frequently Asked Questions Frequently Asked Questions Frequently Asked Questions Frequently Asked Questions Hardware Figure B-1. MSP-FET430X110, SchematicFigure B-1. MSP-FET430X110, Schematic Figure B-2. MSP-FET430X110, PCB Pictorials Figure B-3. MSP-FET430IF FET Interface module, Schematic Figure B-4. MSP-FET430IF FET Interface module, PCB Pictorial Figure B-5. MSP-TS430DW28 Target Socket module, Schematic LED connected to P1.0 Hardware Jumper J7 Jumper J6Open to measure current Hardware Jumper J6 Open to disconnect LED History of changes to MSP-TS430PM64 Target Socket module Figure B-11. MSP-TSPN80 Target Socket module, Schematic Figure B-12. MSP-TSPN80 Target Socket module, PCB Pictorials Figure B-13. MSP-TSPZ100 Target Socket module, Schematic Jumper J6 Figure B-15. MSP-FET430UIF USB Interface schematics Hardware Hardware Hardware Hardware Page FET Specific Menus Emulator EMULATOR-POWER on Reset EMULATOR-FORCE Single Stepping EMULATOR-GIE on/offPin MSP430F44x and MSP430F43x Device Emulation Table D-1. F4xx/80-pin Signal Mapping P1.5/TACLK/ACLK P1.4/TBCLK/SMCLK P1.3/TBOUTH/SVSOUT Page TI to IAR 2.x/3.x Assembler Migration Translating Asm430 Assembler Directives to A430 Directives Segment ControlIntroduction Character stringsDescription Asm430 Directive TI A430 Directive IAR Section Control DirectivesListing Control Directives Constant Initialization DirectivesFile Reference Directives Conditional-Assembly DirectivesReptc Symbol Control DirectivesMiscellaneous Directives Macro DirectivesPreprocessor Directives Asm430 directive A430 directive Additional A430 Directives IARLstpag + #if, #else, #elif Page MSP-FET430UIF Installation Guide Figure F-1. WinXP Hardware Recognition Hardware InstallationFigure F-3. WinXP Driver Location Selection Folder Figure F-4. WinXP Driver Installation Figure F-5. Device Manager