Texas Instruments MSP-FET430 manual Debugging C-SPY, Options-Fet Debugger-Connections

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Frequently Asked Questions

Optimization: NONE is supported within PROJECT->OPTIONS- >C/C++ COMPILER->CODE->OPTIMIZATIONS. Alternatively, variables can be declared volatile.

16)The IAR Tutorial assumes a Full or Baseline version of the Workbench. Within a Kickstart system, it is not possible to configure the C compiler to output assembler mnemonics.

17)Existing projects from an IAR 1.x system can be used within the new IAR 2.x/3.x system; refer to the IAR document Migration guide for EW430 x.x. This document can be located in: <Installation Root>\Embedded Workbench x.x\430\doc\migration.htm

18)Assembler projects must reference the code segment (RSEG CODE) in order to use the LINKER->PROCESSING->FILL UNUSED CODE MEMORY mechanism. No special steps are required to use LINKER ->PROCESSING->FILL UNUSED CODE MEMORY with C projects.

19)Numerous C and C++ libraries are provided with the Workbench:

cl430d:

C, 64-bit doubles

cl430dp:

C, 64-bit doubles, position independent

cl430f:

C, 32-bit doubles

cl430fp:

C, 32-bit doubles, position independent

dl430d:

C++, 64-bit doubles

dl430dp:

C++, 64-bit doubles, position independent

dl430f:

C++, 32-bit doubles

dl430fp:

C++, 32-bit doubles, position independent

A.3 Debugging (C-SPY)

1)C-SPY reports that it cannot communicate with the device. Possible solutions to this problem include:

Ensure that the correct PC port is selected; use PROJECT-

>OPTIONS->FET DEBUGGER->CONNECTIONS

Ensure that R6 on the MSP-FET430X110 and the FET Interface module has a value of 82 ohms. Early units were built using a 330 ohm resistor for R6. Refer to the schematics and pictorials of the MSP-FET430X110 and the FET Interface module presented in Appendix B to locate R6. The FET Interface module can be opened by inserting a thin blade between the case halves, and then carefully twisting the blade so as to pry the case halves apart.

Ensure that the correct parallel port (LPT1, 2, or 3) is being specified in the C-SPY configuration; use PROJECT->OPTIONS-> FET DEBUGGER->CONNECTIONS ->PARALLEL PORT->LPT1 (default) or LPT2 or LPT3. Check the PC BIOS for the parallel port address (0x378, 0x278, 0x3bc), and the parallel port configuration (ECP, Compatible, Bidirectional, or Normal). Refer to FAQ, Debugging #6) later in this document. For users of IBM Thinkpads, please try port specifications LPT2 and LPT3 despite the fact that the operating system reports the parallel port is located at LPT1.

Ensure that no other software application has reserved/taken control of the parallel port (say, printer drivers, ZIP drive drivers, etc.). Such

A-5

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Contents 2004 Users GuideImportant Notice Page July Read This First How to Use This ManualAbout This Manual Related Documentation From Texas Instruments Information About Cautions and WarningsFCC Warning If You Need AssistancePage Contents Frequently Asked Questions Tables FiguresPage Topic Get Started NowKit Contents, MSP-FET430X110 Software Installation Kit Contents, MSP-FET430UIFHardware Installation, MSP-FET430X110 Flashing the LED Hardware Installation, USB-IF, MSP-FET430UIFGet Started Now Important MSP430 Documents on the CD-ROM and WEB Development Flow Overview Using KickstartOUTPUT-OUTPUT FILE-EXECUTABLE Project SettingsFactory Settings Creating a Project from Scratch Stack Management within the .xcl Files Using an Existing IAR V1.x/V2.x ProjectOverview of Example Programs How to Generate Texas Instrument .TXT and other format FilesDevelopment Flow Using Breakpoints Using C-SPYBreakpoint Types Using Single Step Using Watch Windows Page Design Considerations for In-Circuit Programming External Power Bootstrap LoaderDesign Considerations for In-Circuit Programming PRGS430 Device SignalsDesign Considerations for In-Circuit Programming Signal connections for MSP-FET430X110 Design Considerations for In-Circuit Programming Jtag Signal Connections Frequently Asked Questions Hardware Program Development Assembler, C-Compiler, Linker Should Done or Not Return Omit OPTIONS-FET DEBUGGER-CONNECTIONS Debugging C-SPYFrequently Asked Questions Figure A-1. Modification to FET Interface module Frequently Asked Questions Frequently Asked Questions Frequently Asked Questions Frequently Asked Questions Frequently Asked Questions Hardware Figure B-1. MSP-FET430X110, SchematicFigure B-1. MSP-FET430X110, Schematic Figure B-2. MSP-FET430X110, PCB Pictorials Figure B-3. MSP-FET430IF FET Interface module, Schematic Figure B-4. MSP-FET430IF FET Interface module, PCB Pictorial Figure B-5. MSP-TS430DW28 Target Socket module, Schematic LED connected to P1.0 Hardware Jumper J7 Jumper J6Open to measure current Hardware Jumper J6 Open to disconnect LED History of changes to MSP-TS430PM64 Target Socket module Figure B-11. MSP-TSPN80 Target Socket module, Schematic Figure B-12. MSP-TSPN80 Target Socket module, PCB Pictorials Figure B-13. MSP-TSPZ100 Target Socket module, Schematic Jumper J6 Figure B-15. MSP-FET430UIF USB Interface schematics Hardware Hardware Hardware Hardware Page FET Specific Menus Emulator EMULATOR-POWER on Reset EMULATOR-FORCE Single Stepping EMULATOR-GIE on/offPin MSP430F44x and MSP430F43x Device Emulation Table D-1. F4xx/80-pin Signal Mapping P1.5/TACLK/ACLK P1.4/TBCLK/SMCLK P1.3/TBOUTH/SVSOUT Page TI to IAR 2.x/3.x Assembler Migration Character strings Segment ControlTranslating Asm430 Assembler Directives to A430 Directives IntroductionDescription Asm430 Directive TI A430 Directive IAR Section Control DirectivesListing Control Directives Constant Initialization DirectivesFile Reference Directives Conditional-Assembly DirectivesReptc Symbol Control DirectivesMiscellaneous Directives Macro DirectivesPreprocessor Directives Asm430 directive A430 directive Additional A430 Directives IARLstpag + #if, #else, #elif Page MSP-FET430UIF Installation Guide Figure F-1. WinXP Hardware Recognition Hardware InstallationFigure F-3. WinXP Driver Location Selection Folder Figure F-4. WinXP Driver Installation Figure F-5. Device Manager