Texas Instruments TMS320C645x manual Emulation Halt Operation

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EmulationInterruptandHaltEventOperationGeneration / Interrupts and Events

Reading the SET_RIS_TRIG or CLR_RIS_TRIG register returns the value of RIS_TRIG register. Reading from SET_FAL_TRIG and CLR_FAL_TRIG register returns the value of FAL_TRIG register.

To use the GPIO pins as sources for CPU interrupts and EDMA events, bit 0 in the bank interrupt enable register (BINTEN) must be set to 1.

4 Emulation Halt Operation

The GPIO peripheral is not affected by emulation halts.

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General-Purpose Input/Output (GPIO)

SPRU724

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Contents Literature Number SPRU724 December Important Notice Read This First About This ManualTrademarks Contents Figures Tables This page is intentionally left blank General-Purpose OverviewTMS320C645x DSP Block Diagram Gpio Peripheral Block Diagram Gpio Function Gpio Interrupt and Edma Event Configuration Options Interrupt and Event GenerationEmulation Halt Operation Registers Gpio RegistersInterrupt Per-Bank Enable Register Binten Interrupt Per-Bank Enable Register BintenDirection Register DIR Field Descriptions Direction Register DIRDirection Register DIR Output Data Register Outdata Output Data Register Outdata Field DescriptionsSet Data Register Setdata Set Data Register Setdata Field DescriptionsClear Data Register Clrdata Field Descriptions Clear Data Register ClrdataClear Data Register Clrdata Input Data Register Indata Input Data Register Indata Field DescriptionsSet Rising Edge Interrupt Register Setristrig Set Rising Edge Interrupt Register SetristrigClear Rising Edge Interrupt Register Clrristrig Clear Rising Edge Interrupt Register ClrristrigSet Falling Edge Interrupt Register Setfaltrig Set Falling Edge Interrupt Register SetfaltrigClear Falling Edge Interrupt Register Clrfaltrig Clear Falling Edge Interrupt Register ClrfaltrigThis page is intentionally left blank Index

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