Texas Instruments TMS320C645x manual Set Data Register Setdata

Page 19

Registers

5.4Set Data Register (SET_DATA)

The GPIO set data register (SET_DATA) is shown in Figure 6 and described in Table 6. SET_DATA provides an alternate means of driving GPIO outputs high. Writing a 1 to a bit of SET_DATA sets the corresponding bit in OUT_DATA. Writing a 0 has no effect. Reading SET_DATA returns the contents of OUT_DATA.

Figure 6.

Set Data Register (SET_DATA)

 

 

 

 

31

 

 

 

 

 

 

 

16

 

 

 

 

 

 

 

 

 

 

 

Reserved

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R-0

 

 

 

 

15

14

13

12

 

11

10

9

8

 

 

 

 

 

 

 

 

 

SET15

SET14

SET13

SET12

 

SET11

SET10

SET9

SET8

 

 

 

 

 

 

 

 

 

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

7

6

5

4

 

3

2

1

0

 

 

 

 

 

 

 

 

SET7

SET6

SET5

SET4

 

SET3

SET2

SET1

SET0

 

 

 

 

 

 

 

 

 

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

Legend: R = Read only; R/W = Read/Write; -n= value after reset

 

 

 

 

Table 6.

Set Data Register (SET_DATA) Field Descriptions

 

 

 

 

Bit

Field

Value

Description

 

 

 

 

31−16

Reserved

0

Reserved. The reserved bit location is always read as 0. A value written to

 

 

 

this field has no effect.

 

 

 

 

15−0

SETn

 

Writing 1 sets the corresponding bit the OUT_DATA register. Reading this

 

 

 

register returns the contents of the OUT_DATA register. Writing a 0 has no

 

 

 

effect.

 

 

0

No effect

 

 

1

Sets the corresponding bit in OUT_DATA

 

 

 

 

SPRU724

General-Purpose Input/Output (GPIO)

19

Image 19
Contents Literature Number SPRU724 December Important Notice About This Manual Read This FirstTrademarks Contents Figures Tables This page is intentionally left blank Overview General-PurposeTMS320C645x DSP Block Diagram Gpio Peripheral Block Diagram Gpio Function Interrupt and Event Generation Gpio Interrupt and Edma Event Configuration OptionsEmulation Halt Operation Gpio Registers Registers Interrupt Per-Bank Enable Register Binten Interrupt Per-Bank Enable Register BintenDirection Register DIR Direction Register DIRDirection Register DIR Field Descriptions Output Data Register Outdata Field Descriptions Output Data Register OutdataSet Data Register Setdata Field Descriptions Set Data Register SetdataClear Data Register Clrdata Clear Data Register ClrdataClear Data Register Clrdata Field Descriptions Input Data Register Indata Field Descriptions Input Data Register IndataSet Rising Edge Interrupt Register Setristrig Set Rising Edge Interrupt Register SetristrigClear Rising Edge Interrupt Register Clrristrig Clear Rising Edge Interrupt Register ClrristrigSet Falling Edge Interrupt Register Setfaltrig Set Falling Edge Interrupt Register SetfaltrigClear Falling Edge Interrupt Register Clrfaltrig Clear Falling Edge Interrupt Register ClrfaltrigThis page is intentionally left blank Index
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