Texas Instruments ADS5423 EVM, ADS5424 EVM, ADS5433 EVM, ADS5411 EVM manual Physical Description

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Chapter 4

SLWU020B – February 2005 – Revised February 2006

Physical Description

This chapter describes the physical characteristics and PCB layout of the EVM and lists the components used on the module.

4.1PCB Layout

The EVM is constructed on a 6-layer, 4.77-inch × 3.4-inch, 0.062-inch thick PCB using FR-4 material. The individual layers are shown in Figure 4-1through Figure 4-6.

Figure 4-1. Top Layer

SLWU020B –February 2005 –Revised February 2006

Physical Description

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Contents Users Guide Submit Documentation Feedback Contents List of Figures Purpose Power RequirementsEVM Operational Procedure OverviewThree Pin Jumper List Table Jumper Function Location Pins DefaultCircuit Function Schematic DiagramCircuit Description Test Point Function Output Connector J9Test Point Description J9 PIN DescriptionResistors Parts ListBill of Materials for EVM ICs Value QTY Part Number Vendor REF DES Not InstalledPCB Layout Physical DescriptionLayer 2, Ground Plane Layer 3, Power Plane #1 Layer 4, Power Plane #2 Layer 5, Ground Plane Layer 6, Bottom Layer Schematics Ti a DRY Drvdd ADS5424 Evaluation BOARD/KIT Important Notice EVM Warnings and Restrictions FCC WarningImportant Notice