Texas Instruments ADS5423 EVM, ADS5424 EVM, ADS5433 EVM, ADS5411 EVM Layer 3, Power Plane #1

Page 13

www.ti.com

PCB Layout

Figure 4-3. Layer 3, Power Plane #1

SLWU020B –February 2005 –Revised February 2006

Physical Description

13

Image 13
Contents Users Guide Submit Documentation Feedback Contents List of Figures EVM Operational Procedure Power RequirementsOverview PurposeThree Pin Jumper List Table Jumper Function Location Pins DefaultCircuit Description Schematic DiagramCircuit Function Test Point Description Output Connector J9J9 PIN Description Test Point FunctionBill of Materials for EVM Parts ListResistors ICs Value QTY Part Number Vendor REF DES Not InstalledPCB Layout Physical DescriptionLayer 2, Ground Plane Layer 3, Power Plane #1 Layer 4, Power Plane #2 Layer 5, Ground Plane Layer 6, Bottom Layer Schematics Ti a DRY Drvdd ADS5424 Evaluation BOARD/KIT Important Notice EVM Warnings and Restrictions FCC WarningImportant Notice