Texas Instruments ADS5411 manual Output Connector J9, Test Point Description, J9 PIN Description

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Circuit Function

Table 2-1. Output Connector J9

J9 PIN

DESCRIPTION

J9 PIN

DESCRIPTION

1

CLK

21

DATA BIT 6

2

GND

22

GND

3

NC

23

DATA BIT 7

4

GND

24

GND

5

NC

25

DATA BIT 8

6

GND

26

GND

7

NC

27

DATA BIT 9

8

GND

28

GND

9

DATA BIT 0 (LSB)

29

DATA BIT 10

10

GND

30

GND

11

DATA BIT 1

31

DATA BIT 11

12

GND

32

GND

13

DATA BIT 2

33

DATA BIT 12

14

GND

34

GND

15

DATA BIT 3

35

DATA BIT 13 (MSB)

16

GND

36

GND

17

DATA BIT 4

37

OVERFLOW

18

GND

38

GND

19

DATA BIT 5

39

DRVDD

20

GND

40

GND

 

Table 2-2. Test Point Description

TEST POINT

FUNCTION

J14

Monitor Vref (AVDD/2)

J17

Monitor DMID (DVDD/2)

8

Circuit Description

SLWU020B –February 2005 –Revised February 2006

 

 

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Contents Users Guide Submit Documentation Feedback Contents List of Figures Power Requirements EVM Operational ProcedureOverview PurposeJumper Function Location Pins Default Three Pin Jumper List TableCircuit Function Schematic DiagramCircuit Description Output Connector J9 Test Point DescriptionJ9 PIN Description Test Point FunctionResistors Parts ListBill of Materials for EVM Value QTY Part Number Vendor REF DES Not Installed ICsPhysical Description PCB LayoutLayer 2, Ground Plane Layer 3, Power Plane #1 Layer 4, Power Plane #2 Layer 5, Ground Plane Layer 6, Bottom Layer Schematics Ti a DRY Drvdd ADS5424 Evaluation BOARD/KIT Important Notice FCC Warning EVM Warnings and RestrictionsImportant Notice