SUPER MICRO Computer X7DGU, X7DBU I2C Bus to PCI Slots 1/2, I2C Bus to PCI Slots Jumper Settings

Page 46

X7DBU/X7DGU User's Manual

I2C Bus to PCI Slots 1/2

JI2C1 (J27)/JI2C2 (J28) allow you to en- able I2C Bus to PCI-X/PCI-E slots. See the table on the right for jumper set- tings. The default setting is Disabled.

I2C Bus to PCI Slots

Jumper Settings

Jumper

 

Definition

1-2

 

Enabled

 

 

 

 

Off

 

Disabled (De-

 

 

fault)

 

 

 

4-Pin PWR 8-Pin PWR

 

 

 

 

 

 

 

 

Fan7

17

 

 

 

 

 

2PW J

 

3PW J

 

 

 

 

 

 

Buzzer

 

 

J

 

 

 

 

 

 

KB/MS0/1 USBCOM1

 

 

Fan6

Fan5

 

 

PWR SMB

 

 

 

 

 

 

 

 

 

SP1

 

 

 

 

 

 

 

 

Bank4 Bank3

 

 

CPU Fan1

 

 

 

 

 

 

 

 

J9B1J9B2 J8B2J8B3J8B1

 

 

 

 

DIMM4B

 

 

 

 

 

 

1PW J

 

 

JKM1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DIMM4A

 

 

 

 

 

 

 

20-Pin Main PWR

 

 

 

 

 

 

 

 

DIMM3B

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DIMM3A

 

 

 

 

 

 

 

 

Fan1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Bank2

 

 

 

 

 

DIMM2B

 

 

 

 

 

 

 

 

JF1

 

 

J7B3

 

 

 

 

 

 

 

 

 

 

 

 

RLCTP

JCOM1

 

 

 

 

DIMM2A

 

CPU1

 

 

 

 

 

 

Battery

J7B2

 

 

 

 

 

 

 

 

 

 

 

 

 

F

VGA

 

Bank1

 

 

 

 

DIMM1B

 

 

 

 

 

 

 

 

 

J7B1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DIMM1A

 

 

 

 

 

 

 

 

Fan2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

J15

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1DJ

LAN1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LE1

 

 

 

 

 

 

Intel 5000

 

 

 

 

 

 

 

 

JOH1

JLAN1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

JP1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LAN2

 

 

 

 

 

 

(North Bridge)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

JLAN2

UID

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Fan3

 

 

LAN

 

 

 

 

 

 

CPU2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LE2 SW1

Rear

 

J14

B

 

 

 

9J

 

 

0

1ATSA-I

2ATSA-I

3ATAS-I

4ATSA-I

5ATAS-I

Fan8

 

 

 

CTRL

 

 

 

 

 

 

 

 

 

 

 

 

CPU FAN2

 

 

 

 

 

I2C2

I2C1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PCI-X 133 MHz

J28

J27 A

SXB2: PCI-E x8

 

 

 

 

 

 

 

 

 

UIO PWR

J11

 

 

 

 

 

SXB1: PCI-E x16

5J

 

ATA S-I

 

 

 

 

 

 

 

 

 

 

 

 

X7DBU

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1#

 

 

 

 

 

 

 

 

 

 

 

SGPIO1

 

 

 

 

E

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ID

 

 

 

 

 

 

 

 

 

 

 

J29

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Intel ESB2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

J30

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

O

 

 

 

 

 

 

 

 

 

 

 

SGPIO2

 

 

 

 

 

 

 

 

 

 

 

 

 

(South Bridge)

 

 

 

 

 

 

SIM

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

S

 

 

 

 

 

 

 

 

 

 

 

yromeM

SIO B

 

 

 

 

yppFlo

 

 

 

 

 

 

 

 

 

JWOR1

JBT1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

J7

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

JPG1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ES1000

 

oe

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Vid

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

J18

 

 

 

 

 

 

 

 

 

Video CTRL

 

JWD

 

I/O

 

 

 

 

 

 

 

 

 

 

 

 

 

 

JK1

 

 

 

SMB

J22

 

 

 

 

 

 

 

 

 

 

 

 

 

S

 

 

 

 

 

 

 

 

 

 

 

 

 

COM2

JWOL1

 

 

 

 

JL1

 

 

 

 

 

 

 

 

 

 

 

 

 

USB2/3

 

 

 

 

 

 

 

 

 

 

 

JPL1

JPL2

USB4

 

 

Fan4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2-26

 

 

 

 

 

 

 

A.JI2C1

B.JI2C2

Page 45 Page 47
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Page 45 Page 47
Contents Super Reproductive harm Manual Organization About This ManualConventions Used in the Manual Table of Contents Troubleshooting Bios AppendicesChecklist OverviewEurope Contacting SupermicroHeadquarters Asia-PacificX7DBU/X7DGU Image X7DBU/X7DGU Motherboard Layout Not drawn to scaleQuick Reference X7DBU/X7DGU Description Default SettingLE Indicators Description JumperChipset Motherboard FeaturesMemory Expansion SlotsOnboard I/O Acpi FeaturesDimensions OtherSystem Block Diagram for the X7DBU ESB2Chipset Overview Xeon Quad-core/Dual-core Processor FeaturesXeon Quad-core/Dual-core Processor Environmental Temperature Control Special FeaturesRecovery from AC Power Loss PC Health MonitoringMain Switch Override Mechanism Acpi FeaturesSlow Blinking LED for Suspend-State Indicator System Resource AlertExternal Modem Ring-On Power SupplyWake-On-LAN WOL Super I/O Page Static-Sensitive Devices PrecautionsUnpacking Processor and Heatsink Installation Installation of the LGA771 ProcessorPage To Un-install the Heatsink Installation of the HeatsinkCEK Heatsink Installation Mounting the Motherboard in the Chassis Memory Support Installing DIMMsDimm Installation Memory performanceInstalling and Removing DIMMs Possible System Memory Allocation & AvailabilityBack Panel Connectors/IO Ports Control Panel Connectors/IO PortsBack Panel Connectors FP Reset Butto JF1 Header PinsFront Control Panel Front Control Panel Pin Definitions NMI Button Power LEDPower LED Pin Definitions JF1 NMI Button Pin Definitions JF1HDD LED/FP UID Switch NIC1/NIC2 LED IndicatorsOH/Fan Fail/PWR Fail/FP UID LED Pin Definitions JF1 Power Fail LEDOverheat OH/Fan Fail/PWR Fail/FP UID LED OH/Fan Fail/PWR Fail/FP UID Indica Tor StatusReset Button Pin Definitions JF1 Reset ButtonPower Button Power Button Pin Definitions JF1Processor Power Connector Connecting CablesATX Power Connector ATX Power 20-pin Connector Pin DefinitionsUniversal Serial Bus USB Chassis IntrusionPin Fan Header Pin Definitions Fan HeadersKeylock Keylock Pin DefinitionsPS/2 Keyboard Mouse Port Pin Definitions ATX PS/2 Keyboard and PS/2 Mouse PortsSerial Ports Serial Port Pin DefinitionsWake-On-LAN Wake-On-RingWake-On-LAN Pin Definitions Speaker Connector Pin Definitions Power LED/SpeakerGlan 1/2 Giga-bit Ethernet Ports OH/Fan Fail LED Pin Definitions Overheat LED/Fan Fail JOH1Overheat LED Pin Definitions SMB Header Pin DefinitionsPower SMB I2 C Connector VGA ConnectorUnit Identification Switches Sgpio HeadersGlan Enable Jumper Settings Jumper SettingsGlan Enable/Disable Explanation JumpersWatch Dog Jumper Settings JWD Watch Dog Enable/DisableCmos Clear VGA Enable/Disable VGA Enable/Disable Jumper Settings JPG1I2C Bus to PCI Slots Jumper Settings I2C Bus to PCI Slots 1/2Glan Activity Indicator Jumper Settings Onboard IndicatorsGlan LEDs Onboard Power LED LE1 Onboard PWR LED Indicator LE1Floppy Connector StepSimso Ipmi Slot IDE Connector BaleSXB1/SXB2 Slots No Power Troubleshooting ProceduresBefore Power On Losing the System’s Setup ConfigurationTechnical Support Procedures Memory ErrorsFrequently Asked Questions Question How do I update my BIOS?Returning Merchandise for Service Question Whats on the CD that came with my motherboard?Starting the Setup Utility System BiosHow To Change the Configuration Data IntroductionMain Bios Setup Running SetupPress the Delete key to enter Setup Main Bios Setup Menu Main Setup FeaturesUltra DMA Mode LBA Mode ControlTransfer Mode Sata Controller ModeSystem Memory ICH RAID Code Base Available when Sata RAID is EnabledSata Ahci Available when Sata RAID is Disabled Extended MemoryAdvanced Setup Cache Video Bios Area Power Loss ControlMemory Cache Cache System Bios Area Resume On Modem RingDiscrete Mtrr Allocation Cache Base 512K-640KCache Extended Memory PCI ConfigurationPCI Parity Error Forwarding Default Primary Video AdapterEmulated IRQ Solutions PCI Fast Delayed TransactionLarge Disk Access Mode Enable MasterLatency Timer Serr Signal ConditionCrystal Beach Features Memory Branch ModeHigh Temperature Dram Operation Branch 0/1 Rank Interleaving & SparingCore-Multi-Processing Available when supported by the CPU Clock Spectrum FeatureFrequency Ratio Available when supported by the CPU Machine Checking Available when supported by the CPUHardware Prefetcher Available when supported by the CPU C1 Enhanced Mode Available when supported by the CPUExecute Disable Bit Available when supported by the CPU Direct Cache Access Available when supported by the CPUKBC Clock Input Intel Eist Support Available when supported by the CPUI/O Device Configuration Serial Port aEvent Log Validity Floppy Disk ControllerDMI Event Logging Event Log CapacityBaud Rate Console RedirectionCOM Port Address Console TypePeci Agent 1/2 Temperatures/System Temperature Overheat AlarmHardware Monitor Fan Speed Control Modes System TemperatureFan1-Fan8 Speeds Voltage MonitoringSystem Event Logging Bios Post ErrorsBios Post Watch Dog Clear System Event LoggingSystem Event Log/System Event Log List Mode OS Boot Watch DogTimer for Loading OS Minutes Time Out OptionRealtime Sensor Data IPMI LAN ConfigurationVlan Tagging Default GatewayUpdate LAN Settings IP Address SourceSecurity Boot Boot Priority Order/Excluded from Boot OrdersExit Page Appendix a Post Error Beep Codes Recoverable Post Error Beep CodesPage Appendix B Installing the Windows OS Page Installing other Software Programs and Drivers Driver/Tool Installation Display ScreenConfiguring Supero Doctor Supero Doctor III Interface Display Screen-II Remote Control
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