Appendix
18h | Detect CPU information including brand, SMI type (Cyrix or Intel) and | |
| CPU level (586 or 686). | |
Reserved | ||
1Bh | Initial interrupts vector table. If no special specified, all H/W | |
| interrupts are directed to SPURIOUS_INT_HDLR & S/W | |
| interrupts to SPURIOUS_soft_HDLR. | |
1Ch | Reserved | |
1Dh | Initial EARLY_PM_INIT switch. | |
1Eh | Reserved | |
1Fh | Load keyboard matrix (notebook platform) | |
20h | Reserved | |
21h | HPM initialization (notebook platform) | |
22h | Reserved | |
23h | 1. | Check validity of RTC value: |
|
| e.g. a value of 5Ah is an invalid value for RTC minute. |
| 2. | Load CMOS settings into BIOS stack. If CMOS checksum fails, use |
|
| default value instead. |
| 3. | Prepare BIOS resource map for PCI & PnP use. If ESCD is valid, |
|
| take into consideration of the ESCD’s legacy information. |
| 4. | Onboard clock generator initialization. Disable respective clock |
|
| resource to empty PCI & DIMM slots. |
| 5. | Early PCI initialization: |
|
| |
|
| |
|
| |
Reserved | ||
27h | Initialize INT 09 buffer | |
28h | Reserved | |
29h | 1. | Program CPU internal MTRR (P6 & PII) for |
|
| address. |
| 2. | Initialize the APIC for Pentium class CPU. |
| 3. | Program early chipset according to CMOS setup. |
|
| Example: onboard IDE controller. |
| 4. | Measure CPU speed. |
| 5. | Invoke video BIOS. |
Reserved | ||
2Dh | 1. | Initialize |
| 2. | Put information on screen display, including Award title, CPU type, |
|
| CPU speed …. |
Reserved | ||
33h | Reset keyboard except Winbond 977 series Super I/O chips. | |
Reserved | ||
3Ch | Test 8254 | |
3Dh | Reserved | |
3Eh | Test 8259 interrupt mask bits for channel 1. | |
3Fh | Reserved | |
40h | Test 8259 interrupt mask bits for channel 2. | |
41h | Reserved | |
42h | Reserved |