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| Register Map Detail (continued) |
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| 0x1FFF7 |
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| Watchdog Timer |
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| D7 |
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| D5 | D4 |
| D3 |
| D2 |
| D1 | D0 |
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| WDS |
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| WDW |
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| WDT |
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| WDS | Watchdog | Strobe. Setting | this bit to 1 reloads and restarts the watchdog timer. The bit is cleared automatically |
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| once the watchdog timer is reset. The WDS bit is write only. Reading it always will return a 0. |
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| WDW | Watchdog Write Enable. Set this bit to 1 to disable writing of the watchdog |
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| allows the user to strobe the watchdog stobe bit without disturbing the |
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| WDT | Watchdog |
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| a multiplier of the 32 Hz count (31.25 ms). The range of |
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| (setting of 3Fh). Setting the watchdog timer register to 0 disables the timer. These bits can be written only if the |
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| WDW bit was cleared to 0 on a previous cycle. |
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| 0x1FFF6 |
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| Interrupt |
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| D7 |
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| D5 | D4 |
| D3 |
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| D1 | D0 |
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| WIE |
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| AIE |
| PFIE | ABE |
| H/L |
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| 0 | 0 |
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| WIE | Watchdog | Interrupt Enable. | When set to | 1 and a watchdog |
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| as well as setting the WDF flag. When set to 0, the watchdog |
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| AIE | Alarm Interrupt Enable. When set to 1, the alarm match drives the INT pin as well as setting the AF flag. When set |
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| to 0, the alarm match only affects the AF flag. |
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| PFIE |
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| the power failure only sets the PF flag. |
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| 0 | Reserved For Future Used |
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| H/L | High/Low. When set to a 1, the INT pin is driven active high. When set to 0, the INT pin is open drain, active low. |
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| P/L | Pulse/Level. When set to a 1, the INT pin is driven active (determined by H/L) by an interrupt source for approxi- |
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| mately 200 ms. When set to a 0, the INT pin is driven to an active level (as set by H/L) until the Flags register is read. |
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| 0x1FFF5 |
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| Alarm – Day |
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| D7 |
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| D5 | D4 |
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| D1 | D0 |
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| M | 0 |
| 10s Alarm Date |
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| Alarm Date |
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| Contains the | alarm value for the date of the month and the mask bit to select or deselect the date value. |
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| M | Match. Setting this bit to 0 causes the date value to be used in the alarm match. Setting this bit to 1 causes the |
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| match circuit to ignore the date value. |
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| 0x1FFF4 |
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| Alarm – Hours |
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| D5 | D4 |
| D3 |
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| D1 | D0 |
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| M | 0 |
| 10s Alarm Hours |
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| Alarm Hours |
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| Contains the | alarm value for the hours and the mask bit to select or deselect the hours value. |
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| M | Match. Setting this bit to 0 causes the hours value to be used in the alarm match. Setting this bit to 1 causes the |
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| match circuit to ignore the hours value. |
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| 0x1FFF4 |
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| Alarm – Hours |
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| D5 | D4 |
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| D1 | D0 |
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| M | 0 |
| 10s Alarm Hours |
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| Alarm Hours |
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| Contains the | alarm value for the hours and the mask bit to select or deselect the hours value. |
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| M | Match. Setting this bit to 0 causes the hours value to be used in the alarm match. Setting this bit to 1 causes the |
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| match circuit to ignore the hours value. |
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Document #: | Page 19 of 23 |
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