Cypress STK17TA8 manual Absolute Maximum Ratings, DC Electrical Characteristics, Min Max

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STK17TA8

Absolute Maximum Ratings

Voltage on Input Relative to Ground

................–0.1V to 4.1V

Voltage on Input Relative to VSS

–0.5V to (VCC + 0.5V)

Voltage on DQ0-7or

HSB

.....................

Temperature under Bias

–55°C to 125°C

Junction Temperature

–55°C to 140°C

Storage Temperature

–65°C to 150°C

Power Dissipation

1W

DC Output Current (1 output at a time, 1s duration)..... 15mA

RF (SSOP-48) Package Thermal Characteristics

θjc 6.2 C/W; θja 51.1 [0fpm], 44.7 [200fpm], 41.8 C/W [500fpm]

Note: Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliablity.

DC Electrical Characteristics

(VCC = 2.7V-3.6V)

Symbol

Parameter

Commercial

Industrial

Units

 

 

Notes

Min

Max

Min

Max

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ICC1

Average VCC Current

 

65

 

70

mA

 

tAVAV = 25 ns

 

 

 

50

 

55

mA

 

tAVAV = 45 ns

 

 

 

 

 

 

 

 

Dependent on output loading and

 

 

 

 

 

 

 

 

cycle rate. Values obtained

 

 

 

 

 

 

 

 

without output loads.

ICC2

Average VCC Current during

 

3

 

3

mA

All Inputs Don’t Care, VCC = max

 

STORE

 

 

 

 

 

 

Average current for duration of

 

 

 

 

 

 

 

 

STORE

 

 

 

 

 

 

 

 

cycle (tSTORE)

ICC3

Average VCC Current at tAVAV =

 

10

 

10

mA

 

 

(V CC– 0.2V)

 

 

W

 

200ns

 

 

 

 

 

 

All Other Inputs Cycling at CMOS

 

3V, 25°C, Typical

 

 

 

 

 

 

Levels

 

 

 

 

 

 

 

 

Dependent on output loading and

 

 

 

 

 

 

 

 

cycle rate. Values obtained

 

 

 

 

 

 

 

 

without output loads.

ICC4

Average VCAP Current during

 

3

 

3

mA

All Inputs Don’t Care

 

<Emphasis>AutoStore™ Cycle

 

 

 

 

 

 

Average current for duration of

 

 

 

 

 

 

 

 

STORE cycle (tSTORE)

ISB

VCC Standby Current

 

3

 

3

mA

 

E ≥ (VCC -0.2V)

 

(Standby, Stable CMOS Levels)

 

 

 

 

 

 

All Others VIN0.2V or

 

 

 

 

 

 

 

 

(VCC-0.2V)

 

 

 

 

 

 

 

 

Standby current level after

 

 

 

 

 

 

 

 

nonvolatile cycle complete

IILK

Input Leakage Current

 

±1

 

±1

mA

VCC = max

 

 

 

 

 

 

 

 

VIN = VSS to VCC

IOLK

Off-State Output Leakage Current

 

±1

 

±1

mA

 

VCC = max

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIN = VSS to VCC, E or G VIH

VIH

Input Logic “1” Voltage

2.0

VCC + 0.5

2.0

VCC + 0.5

V

All Inputs

VIL

Input Logic “0” Voltage

VSS –0.5

0.8

VSS –0.5

0.8

V

All Inputs

VOH

Output Logic “1” Voltage

2.4

 

2.4

 

V

IOUT = – 2 mA (except

 

 

 

 

 

 

HSB)

VOL

Output Logic “0” Voltage

 

0.4

 

0.4

V

IOUT = 4 mA

Note: The HSB pin has IOUT=-10uA for VOH of 2.4V, this parameter is characterized but not tested.

Note: The INT is open-drain and does not source or sink high current when interrupt Register bit D3 is below.

Document #: 001-52039 Rev. **

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Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram DescriptionPin Descriptions PinoutsAbsolute Maximum Ratings DC Electrical CharacteristicsRF SSOP-48 Package Thermal Characteristics Symbol Parameter Commercial Industrial Units MinCapacitance Symbol Parameter Commercial Industrial Units Min MaxSymbol Parameter Max Units Conditions AC Test ConditionsRTC DC Characteristics Sram Read Cycles #1 and #2 Symbols Parameter STK17TA8-25 STK17TA8-45 Units Alt Min MaxSram Write Cycles #1 and #2 AutoStore/Power Up Recall Symbols ParameterUnits Standard Alternate Min Max Software-Controlled STORE/RECALL Cycle Hardware Store Pulse Width Soft Sequence CommandsHardware Store to Sram Disabled Hardware Store CycleA16-A0 Mode Power Mode SelectionAutoStore Operation Hardware Recall POWER-UPNvSRAM Operation Hardware Store HSB OperationNoise Considerations Low Average Active PowerSoftware Recall Data ProtectionRTC Operations Calibrating The Clock Watchdog TimerAlarm Power MonitorInterrupts Flags RegisterInterrupt Register Register BCD Format Data Function / Range RTC RegisterRegister Map Detail 0x1FFF6 Interrupt 0x1FFF5 Alarm Day0x1FFF4 Alarm Hours 0x1FFF7WDF Oscf CAL 0x1FFF2 Alarm Seconds0x1FFF1 Real Time Clock Centuries 10s Centuries 0x1FFF0 FlagsOrdering Codes Ordering Information51-85061 *C Document # 001-52039 Rev Package DiagramsSales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC SolutionsDocument History