STK17TA8
Absolute Maximum Ratings
Voltage on Input Relative to Ground | |||
Voltage on Input Relative to VSS | |||
Voltage on | HSB | ..................... | |
Temperature under Bias | |||
Junction Temperature | |||
Storage Temperature | |||
Power Dissipation | 1W |
DC Output Current (1 output at a time, 1s duration)..... 15mA
RF (SSOP-48) Package Thermal Characteristics
θjc 6.2 C/W; θja 51.1 [0fpm], 44.7 [200fpm], 41.8 C/W [500fpm]
Note: Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliablity.
DC Electrical Characteristics
(VCC =
Symbol | Parameter | Commercial | Industrial | Units |
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Min | Max | Min | Max |
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ICC1 | Average VCC Current |
| 65 |
| 70 | mA |
| tAVAV = 25 ns | |||||||
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| 50 |
| 55 | mA |
| tAVAV = 45 ns | |||||||
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| Dependent on output loading and | |||||||
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| cycle rate. Values obtained | |||||||
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| without output loads. | |||||||
ICC2 | Average VCC Current during |
| 3 |
| 3 | mA | All Inputs Don’t Care, VCC = max | ||||||||
| STORE |
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| Average current for duration of | |||||||
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| STORE | |||||||
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| cycle (tSTORE) | |||||||
ICC3 | Average VCC Current at tAVAV = |
| 10 |
| 10 | mA |
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| ≥ (V CC– 0.2V) | ||||||
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| W | |||||||||||||
| 200ns |
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| All Other Inputs Cycling at CMOS | |||||||
| 3V, 25°C, Typical |
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| Levels | |||||||
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| Dependent on output loading and | |||||||
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| cycle rate. Values obtained | |||||||
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| without output loads. | |||||||
ICC4 | Average VCAP Current during |
| 3 |
| 3 | mA | All Inputs Don’t Care | ||||||||
| <Emphasis>AutoStore™ Cycle |
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| Average current for duration of | |||||||
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| STORE cycle (tSTORE) | |||||||
ISB | VCC Standby Current |
| 3 |
| 3 | mA |
| E ≥ (VCC | |||||||
| (Standby, Stable CMOS Levels) |
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| All Others VIN≤ 0.2V or ≥ | |||||||
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| Standby current level after | |||||||
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| nonvolatile cycle complete | |||||||
IILK | Input Leakage Current |
| ±1 |
| ±1 | mA | VCC = max | ||||||||
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| VIN = VSS to VCC | |||||||
IOLK |
| ±1 |
| ±1 | mA |
| VCC = max |
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| VIN = VSS to VCC, E or G ≥ VIH | |||||||
VIH | Input Logic “1” Voltage | 2.0 | VCC + 0.5 | 2.0 | VCC + 0.5 | V | All Inputs | ||||||||
VIL | Input Logic “0” Voltage | VSS | 0.8 | VSS | 0.8 | V | All Inputs | ||||||||
VOH | Output Logic “1” Voltage | 2.4 |
| 2.4 |
| V | IOUT = – 2 mA (except |
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VOL | Output Logic “0” Voltage |
| 0.4 |
| 0.4 | V | IOUT = 4 mA |
Note: The HSB pin has
Note: The INT is
Document #: | Page 3 of 23 |
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