Cypress STK17TA8 manual Pinouts, Pin Descriptions

Page 2

STK17TA8

Pinouts

Figure 1. Pin Diagram - 48-PIn SSOP

Relative PCB Area Usage[1]

VCAP A16 A14

A12

A7

A6

A5

INT

A4

NC

NC

NC

VSS

NC

VRTCbat

DQ 0

A3

A2

A1

A0

DQ 1

DQ 2

X1

X2

148 V CC

247 A15

346 HSB

445 W

544 A13

643 A8

742 A9

841 NC

940 A11

10

(TOP)

39

 

NC

11

38

 

NC

 

 

12

 

37

 

NC

 

 

 

 

13

 

36

 

V SS

 

 

 

 

1435 NC

1534 V RTCcap

1633 DQ 6

1732 G

1831 A10

1930 E

2029 DQ 7

2128 DQ 5

2227 DQ 4

2326 DQ 3

2425 V CC

Pin Descriptions

Pin Name

IO Type

 

 

Description

A16-A0

Input

Address: The 17 address inputs select one of 131,072 bytes in the nvSRAM array or one of 16 bytes

 

 

in the clock register map

DQ7-DQ0

I/O

Data: Bi-directional 8-bit data bus for accessing the nvSRAM and RTC

E

Input

Chip Enable: The active low

 

input selects the device

E

WInput Write Enable: The active low W enables data on the DQ pins to be written to the address location selected on the falling edge of E

GInput Output Enable: The active low G input enables the data output buffers during read cycles. De-asserting G high caused the DQ pins to tri-state.

X1

Output

Crystal Connection, drives crystal on startup

X2

Input

Crystal Connection for 32.768 kHz crystal

VRTCcap

Power Supply

Capacitor supplied backup RTC supply voltage (Left unconnected if VRTCbat is used)

VRTCbat

Power Supply

Battery supplied backup RTC supply voltage (Left unconnected if VRTCcap is used)

VCC

Power Supply

Power: 3.0V, +20%, -10%

HSB

I/O

 

: When low this output indicates a Store is in progress. When pulled low external

Hardware Store Busy

 

 

to the chip, it will initiate a nonvolatile STORE operation. A weak pull up resistor keeps this pin high if

 

 

not connected. (Connection Optional).

INT

Output

Interrupt Control: Can be programmed to respond to the clock alarm, the watchdog timer and the

 

 

power monitor. Programmable to either active high (push/pull) or active low (open-drain)

VCAP

Power Supply

Autostore™ Capacitor: Supplies power to nvSRAM during power loss to store data from SRAM to

 

 

nonvolatile storage elements.

VSS

Power Supply

Ground

NC

No Connect

Unlabeled pins have no internal connections.

Note

1. For detailed package size specifications, See “Package Diagrams” on page 22..

Document #: 001-52039 Rev. **

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Contents Description FeaturesLogic Block Diagram Cypress Semiconductor Corporation 198 Champion CourtPinouts Pin DescriptionsSymbol Parameter Commercial Industrial Units Min DC Electrical CharacteristicsRF SSOP-48 Package Thermal Characteristics Absolute Maximum RatingsAC Test Conditions Symbol Parameter Commercial Industrial Units Min MaxSymbol Parameter Max Units Conditions CapacitanceRTC DC Characteristics Symbols Parameter STK17TA8-25 STK17TA8-45 Units Alt Min Max Sram Read Cycles #1 and #2Sram Write Cycles #1 and #2 Units Standard Alternate Min Max AutoStore/Power Up RecallSymbols Parameter Software-Controlled STORE/RECALL Cycle Hardware Store Cycle Soft Sequence CommandsHardware Store to Sram Disabled Hardware Store Pulse WidthMode Selection A16-A0 Mode PowerHardware Store HSB Operation Hardware Recall POWER-UPNvSRAM Operation AutoStore OperationData Protection Low Average Active PowerSoftware Recall Noise ConsiderationsRTC Operations Power Monitor Watchdog TimerAlarm Calibrating The ClockInterrupt Register InterruptsFlags Register RTC Register Register BCD Format Data Function / RangeRegister Map Detail 0x1FFF7 0x1FFF5 Alarm Day0x1FFF4 Alarm Hours 0x1FFF6 Interrupt0x1FFF0 Flags 0x1FFF2 Alarm Seconds0x1FFF1 Real Time Clock Centuries 10s Centuries WDF Oscf CALOrdering Information Ordering CodesPackage Diagrams 51-85061 *C Document # 001-52039 RevDocument History Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions