STK17TA8
128k X 8 AutoStore™ nvSRAM with Real Time Clock
Features
■nvSRAM Combined with Integrated Real Time Clock Functions (RTC, Watchdog Timer, Clock Alarm, Power Monitor)
■Capacitor or Battery Backup for RTC
■25, 45 ns Read Access and Read/Write Cycle Time
■Unlimited Read/Write Endurance
■Automatic nonvolatile STORE on Power Loss
■Nonvolatile STORE Under Hardware or Software Control
■Automatic RECALL to SRAM on Power Up
■Unlimited RECALL Cycles
■200K STORE Cycles
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■Single 3 V +20%,
■Commercial and Industrial Temperatures
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Description
The Cypress STK17TA8 combines a 1 Mb nonvolatile static RAM (nvSRAM) with a full featured real time clock in a reliable, monolithic integrated circuit.
The 1 Mb nvSRAM is a fast static RAM with a nonvolatile Quantum Trap storage element included with each memory cell.
The SRAM provides the fast access and cycle times, ease of use and unlimited read and write endurance of a normal SRAM. Data transfers automatically to the nonvolatile storage cells when power loss is detected (the STORE operation). On power up, data is automatically restored to the SRAM (the RECALL operation). Both STORE and RECALL operations are also available under software control.
The real time clock function provides an accurate clock with leap year tracking and a programmable, high accuracy oscillator. The Alarm function is programmable for
Logic Block Diagram
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| Quantum Trap | VCC | VCAP |
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A5 |
| 1024 X 1024 | POWER | VRTCbat |
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A6 | DECODER |
| STORE | CONTROL | VRTCcap |
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A7 |
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A8 | STATIC RAM |
| STORE/ |
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A9 | RECALL |
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ARRAY | RECALL |
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A12 |
| HSB |
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A13 | ROW | 1024 X 1024 |
| CONTROL |
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A14 |
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A15 |
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| SOFTWARE |
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A16 |
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| A15 – A0 | ||
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| DETECT |
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DQ0 | BUFFERS | COLUMN I/O |
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DQ1 |
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| X1 | ||
DQ2 | COLUMN DEC |
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| RTC |
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DQ3 |
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| X2 | ||
DQ4 |
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| INT | |
INPUT |
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DQ5 | A0 A1 A2 A3 A4 A10 A11 |
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DQ6 |
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| MUX |
| A16 – A0 | |
DQ7 |
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Cypress Semiconductor Corporation • 198 Champion Court | • | San Jose, CA | • | |
Document #: |
| Revised March 02, 2009 |
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