Cypress STK17TA8 AutoStore/Power Up Recall, Symbols Parameter, Units Standard Alternate Min Max

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STK17TA8

AutoStore/Power Up Recall

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NOTE: Read and Write cycles will be ignored during STORE, RECALL and while VCC is below VSWITCH

Notes

9.tHRECALL starts from the time VCC rises above VSWITCH

10.If an SRAM WRITE has not taken place since the last nonvolatile cycle, no STORE will take place

11.Industrial Grade Devices require 15 ms MAX.

Document #: 001-52039 Rev. **

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Contents Features Logic Block DiagramDescription Cypress Semiconductor Corporation 198 Champion CourtPinouts Pin DescriptionsDC Electrical Characteristics RF SSOP-48 Package Thermal CharacteristicsSymbol Parameter Commercial Industrial Units Min Absolute Maximum RatingsSymbol Parameter Commercial Industrial Units Min Max Symbol Parameter Max Units ConditionsAC Test Conditions CapacitanceRTC DC Characteristics Symbols Parameter STK17TA8-25 STK17TA8-45 Units Alt Min Max Sram Read Cycles #1 and #2Sram Write Cycles #1 and #2 Units Standard Alternate Min Max AutoStore/Power Up RecallSymbols Parameter Software-Controlled STORE/RECALL Cycle Soft Sequence Commands Hardware Store to Sram DisabledHardware Store Cycle Hardware Store Pulse WidthMode Selection A16-A0 Mode PowerHardware Recall POWER-UP NvSRAM OperationHardware Store HSB Operation AutoStore OperationLow Average Active Power Software RecallData Protection Noise ConsiderationsRTC Operations Watchdog Timer AlarmPower Monitor Calibrating The ClockInterrupt Register InterruptsFlags Register RTC Register Register BCD Format Data Function / RangeRegister Map Detail 0x1FFF5 Alarm Day 0x1FFF4 Alarm Hours0x1FFF7 0x1FFF6 Interrupt0x1FFF2 Alarm Seconds 0x1FFF1 Real Time Clock Centuries 10s Centuries0x1FFF0 Flags WDF Oscf CALOrdering Information Ordering CodesPackage Diagrams 51-85061 *C Document # 001-52039 RevDocument History Sales, Solutions, and Legal InformationWorldwide Sales and Design Support Products PSoC Solutions