Cypress CY14B101K manual Min Max, Parameter Sram Write Cycle

Page 18

CY14B101K

AC Switching Characteristics (continued)

Parameter

Description

25 ns

35 ns

45 ns

Unit

Cypress

Alt.

Min

Max

Min

Max

Min

Max

Parameter

Parameter

 

 

 

 

 

 

 

 

 

 

SRAM Write

Cycle

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

tWC

tAVAV

Write Cycle Time

25

 

35

 

45

 

ns

tPWE

tWLWH, tWLEH

Write Pulse Width

20

 

25

 

30

 

ns

tSCE

tELWH, tELEH

Chip Enable To End of Write

20

 

25

 

30

 

ns

tSD

tDVWH, tDVEH

Data Setup to End of Write

10

 

12

 

15

 

ns

tHD

tWHDX, tEHDX

Data Hold After End of Write

0

 

0

 

0

 

ns

tAW

tAVWH, tAVEH

Address Setup to End of Write

20

 

25

 

30

 

ns

tSA

tAVWL, tAVEL

Address Setup to Start of Write

0

 

0

 

0

 

ns

tHA

tWHAX, tEHAX

Address Hold After End of Write

0

 

0

 

0

 

ns

tHZWE [13, 16]

tWLQZ

Write Enable to Output Disable

 

10

 

13

 

15

ns

tLZWE [13]

tWHQX

Output Active After End of Write

3

 

3

 

3

 

ns

Figure 10. SRAM Write Cycle 1: WE Controlled [15, 17]

 

tWC

ADDRESS

 

 

tSCE

CE

 

 

tAW

 

tSA

WE

tPWE

 

 

tSD

DATA IN

DATA VALID

 

tHZWE

 

HIGH IMPEDANCE

DATA OUT

PREVIOUS DATA

tHA

tHD

tLZWE

Figure 11. SRAM Write Cycle 2: CE Controlled

ADDRESS

CE

WE

DATA IN

DATA OUT

tSA

tWC

tSCE

 

 

 

tHA

 

 

tAW

tPWE

tSD tHD

DATA VALID

HIGH IMPEDANCE

Notes

16.If WE is Low when CE goes Low, the outputs remain in the High Impedance State.

17.CE or WE are greater than VIH during address transitions.

Document Number: 001-06401 Rev. *I

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Contents Functional Description FeaturesLogic Block Diagram Cypress Semiconductor Corporation 198 Champion CourtPower Supply Inputs to the Device Pin ConfigurationsOutput Enable, Active LOW. The active low Pin DefinitionsDevice Operation AutoStore OperationHardware Store HSB Operation Software Recall Hardware Recall Power UpSoftware Store Data ProtectionLow Average Active Power Best Practices Current versus Cycle TimeWrite Sram Mode Selection A15 A0 PowerRead Sram StoreReal Time Clock Operation Alarm Watchdog TimerCalibrating the Clock Interrupt Register Power MonitorInterrupts Flags RegisterInterrupt Block Diagram Recommended ValuesRTC Register Map5 BCD Format Data Function/Range WDF OscfDate Time Keeping Hours 0x1FFFB Register Map Detail Time Keeping Years 0x1FFFF 10s YearsTime Keeping Months 0x1FFFE 10s Month Time Keeping Minutes 0x1FFFA0x1FFF7 Alarm Day 0x1FFF5Register Map Detail Calibration/Control Interrupt Status/Control 0x1FFF6Register Map Detail Alarm Hours 0x1FFF4 10s Alarm Hours To ignore the hours value Alarm Minutes 0x1FFF3When the Flags register is read or on power-up Maximum Ratings DC Electrical CharacteristicsRange Ambient Temperature Operating RangeThermal Resistance Data Retention and EnduranceCapacitance AC Test ConditionsAC Switching Characteristics Parameter Sram Read CycleMin Max Parameter Sram Write CycleAutoStore or Power Up Recall Parameter Description CY14B101K Unit Min MaxSoftware Controlled STORE/RECALL Cycles 21 Parameter Alt Description 25 ns 35 ns 45 ns Unit Min MaxSoft Sequence Commands Hardware Store CycleRTC Characteristics Inputs and Outputs Mode PowerTruth Table For Sram Operations Part Numbering Nomenclature CY 14 B 101 K SP 25 X C T NvsramOrdering Information Package Diagrams Pin Shrunk Small Outline PackageDocument History Orig. of Change Submission Description of Change DateUpdated Features 2663934Sales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC SolutionsUSB