CY14B101K
Document History Page
Document Title: CY14B101K 1 Mbit (128K x 8) nvSRAM With Real Time Clock
Document Number:
REV. | ECN NO. | Orig. of Change | Submission | Description of Change | |||
Date | |||||||
|
|
|
|
|
| ||
|
|
|
|
| |||
** | 425138 | TUP | See ECN | New data sheet | |||
|
|
|
|
| |||
*A | 437321 | TUP | See ECN | Show data sheet on External Web | |||
|
|
|
|
| |||
*B | 471966 | TUP | See ECN | Changed ICC3 from 5 mA to 10 mA | |||
|
|
|
| Changed ISB from 2 mA to 3 mA | |||
|
|
|
| Changed VIH(min) from 2.2V to 2.0V | |||
|
|
|
| Changed tRECALL from 40 ms to 100 ms | |||
|
|
|
| Changed Endurance from 1 million Cycles to 500K Cycles | |||
|
|
|
| Changed Data Retention from 100 years to 20 years | |||
|
|
|
| Added Soft Sequence Processing Time Waveform | |||
|
|
|
| Updated Part Numbering Nomenclature and Ordering Infor- | |||
|
|
|
| mation | |||
|
|
|
| Added RTC Characteristics Table | |||
|
|
|
| Added RTC Recommended Component Configuration | |||
*C | 503272 | PCI | See ECN | Changed from Advance to Preliminary | |||
|
|
|
| Changed the term “Unlimited” to “Infinite” | |||
|
|
|
| Changed Endurance from 500K Cycles to 200K Cycles | |||
|
|
|
| Added temperature spec. to Data Retention - 20 years at 55×C | |||
|
|
|
| Removed Icc1 values from the DC table for 25 ns and 35 ns | |||
|
|
|
| Industrial Grade | |||
|
|
|
| Changed Icc2 value from 3 mA to 6 mA in the DC Table | |||
|
|
|
| Added a footnote on VIH | |||
|
|
|
| Added footnote 18 related to using the software command | |||
|
|
|
| Changed VSWITCH(min) from 2.55V to 2.45V | |||
|
|
|
| Updated Part Nomenclature Table and Ordering Information | |||
|
|
|
| Table | |||
*D | 597002 | TUP | See ECN | Removed VSWITCH(min) specification from the AutoStore/Power | |||
|
|
|
| Up RECALL Table | |||
|
|
|
| Changed tGLAX specification from 20 ns to 1 ns | |||
|
|
|
| Added tDELAY(max) specification of 70 ms in the Hardware STORE | |||
|
|
|
| Cycle Table | |||
|
|
|
| Removed tHLBL specification | |||
|
|
|
| Changed tSS specification form 70 ms (min) to 70 ms (max) | |||
|
|
|
| Changed VCAP(max) from 57 mF to 120 mF | |||
*E | 688776 | VKN | See ECN | Added footnote 7 related to | HSB |
| |
|
|
|
| Added footnote 8 related to INT pin | |||
|
|
|
| Changed tGLAX to tGHAX | |||
|
|
|
| Removed ABE bit from interrupt register | |||
*F | 1349963 | UHA/SFV | See ECN | Changed from Preliminary to Final | |||
|
|
|
| Added Note 5 regarding the W bit in the Flag register | |||
|
|
|
| Updated Ordering Information Table | |||
*G | 1739984 | vsutmp8/AESA | See ECN | Added Pinout diagram and Pin definition Table | |||
|
|
|
|
| |||
*H | 2427986 | GVCH/PYRS | 04/23/08 | Move to external web | |||
|
|
|
|
|
|
| |
Document Number: | Page 26 of 28 |
[+] Feedback