Cypress CY14B101K manual 2663934, Updated Features

Page 27

CY14B101K

Document Title: CY14B101K 1 Mbit (128K x 8) nvSRAM With Real Time Clock

Document Number: 001-06401

REV.

ECN NO.

Orig. of Change

Submission

Description of Change

Date

 

 

 

 

 

 

 

 

 

 

 

*I

2663934

GVCH/PYRS

02/24/09

Updated Features

 

 

 

 

Updated pin definition of

WE

 

 

 

 

 

Removed AutoStore enable/disable section

 

 

 

 

Added Best practices

 

 

 

 

Updated “Reading the clock”, “Backup Power”, “Stopping and

 

 

 

 

starting the Oscillator” and “Alarm” descriptions under RTC

 

 

 

 

operation

 

 

 

 

Modified “Figure 4. RTC Recommended Component Configu-

 

 

 

 

ration”

 

 

 

 

Added footnotes 4, 5 and 6

 

 

 

 

Added default values to RTC Register Map” table

 

 

 

 

Updated flag register description in Register Map Detail” table

 

 

 

 

Added Industrial specs for 25ns and 35ns speed

 

 

 

 

Changed VIH from Vcc+0.3 to Vcc+0.5

 

 

 

 

Added “Data Retention and Endurance” table on page 15

 

 

 

 

Added Thermal resistance values

 

 

 

 

Added alternate parameters in the AC switching characteristics

 

 

 

 

table

 

 

 

 

Renamed tOH to tOHA

 

 

 

 

Changed tHRECALL from 20 to 40ms

 

 

 

 

Changed tRECALL spec from 100μs to 170μs (Including tss of

 

 

 

 

70us)

 

 

 

 

Renamed tAS to tSA

 

 

 

 

Renamed tGHAX to tHA

 

 

 

 

Updated Figure 13, 14, 15 and 16

 

 

 

 

Renamed tHLHX to tPHSB

 

 

 

 

Added truth table for SRAM operations

Document Number: 001-06401 Rev. *I

Page 27 of 28

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Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram Functional DescriptionPin Definitions Pin ConfigurationsOutput Enable, Active LOW. The active low Power Supply Inputs to the DeviceDevice Operation AutoStore OperationHardware Store HSB Operation Data Protection Hardware Recall Power UpSoftware Store Software RecallCurrent versus Cycle Time Low Average Active Power Best PracticesStore Mode Selection A15 A0 PowerRead Sram Write SramReal Time Clock Operation Alarm Watchdog TimerCalibrating the Clock Flags Register Power MonitorInterrupts Interrupt RegisterRecommended Values Interrupt Block DiagramWDF Oscf RTC Register Map5 BCD Format Data Function/RangeTime Keeping Minutes 0x1FFFA Register Map Detail Time Keeping Years 0x1FFFF 10s YearsTime Keeping Months 0x1FFFE 10s Month Date Time Keeping Hours 0x1FFFBInterrupt Status/Control 0x1FFF6 Alarm Day 0x1FFF5Register Map Detail Calibration/Control 0x1FFF7Register Map Detail Alarm Hours 0x1FFF4 10s Alarm Hours To ignore the hours value Alarm Minutes 0x1FFF3When the Flags register is read or on power-up Operating Range DC Electrical CharacteristicsRange Ambient Temperature Maximum RatingsAC Test Conditions Data Retention and EnduranceCapacitance Thermal ResistanceParameter Sram Read Cycle AC Switching CharacteristicsParameter Sram Write Cycle Min MaxParameter Description CY14B101K Unit Min Max AutoStore or Power Up RecallParameter Alt Description 25 ns 35 ns 45 ns Unit Min Max Software Controlled STORE/RECALL Cycles 21Hardware Store Cycle Soft Sequence CommandsRTC Characteristics Inputs and Outputs Mode PowerTruth Table For Sram Operations Nvsram Part Numbering Nomenclature CY 14 B 101 K SP 25 X C TOrdering Information Pin Shrunk Small Outline Package Package DiagramsOrig. of Change Submission Description of Change Date Document History2663934 Updated FeaturesSales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC SolutionsUSB