Cypress CY7C139, CY7C138 manual Document History, Sales, Solutions and Legal Information

Page 17

CY7C138, CY7C139

Document History Page

Document Title: CY7C138/CY7C139 4K x 8/9 Dual-Port Static RAM with Sem, Int, Busy

Document Number: 38-06037

Rev.

ECN No.

Orig. of

Submission

Description of Change

 

 

Change

Date

 

**

110180

SZV

09/29/01

Change from Spec number: 38-00536 to 38-06037

 

 

 

 

 

*A

122287

RBI

12/27/02

Power up requirements added to Maximum Ratings Information

 

 

 

 

 

*B

393403

YIM

See ECN

Added Pb-Free Logo

 

 

 

 

Added Pb-Free parts to ordering information:

 

 

 

 

CY7C138-15JXC, CY7C138-25JXC, CY7C139-25JXC

*C

2623658

VKN/PYRS

12/17/08

Added CY7C138-25JXI part

 

 

 

 

Removed CY7C139 from the Ordering information table

*D

2672737

GNKK

03/12/2009

Updated title in the Document History table

 

 

 

 

 

Sales, Solutions and Legal Information

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© Cypress Semiconductor Corporation, 2005-2009. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

Document #: 38-06037 Rev. *D

Revised March 12, 2009

Page 17 of 17

All products and company names mentioned in this document may be the trademarks of their respective holders.

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Contents Logic Block Diagram FeaturesFunctional Description Cypress Semiconductor Corporation 198 Champion CourtPin Definitions Left Port Right Port Description Pin ConfigurationsSelection Guide Description UnitTemperature Electrical Characteristics Over the Operating RangeMaximum Ratings Operating RangeParameter Description Test Conditions Max Unit Capacitance8Output Switching Characteristics Over the Operating Range9GND ALL Input PulsesTiming Switching WaveformsBusy Data OUTAddress R Match Data OUT Data ValidData INR Valid Address L Match Data Outl ValidData Data Valid Address SEM or CEHigh Impedance AddressSEM Valid AddressDataout Valid Write Cycle Read CycleData INR Valid Addressr MatchAddressl Match BusylADDRESSL,R CER CEL Busy L Address L,R Address Match CEL CER BusyrAddress L Addressr Busyr Address Match Address MismatchLeft Side Clears Intl Right Side Clears INT RRight Side Sets Intl Write Operation ArchitectureRight Port Function Non-Contending Read/Write Inputs Outputs OperationInterrupt Operation Example assumes Normalized Supply Current Supply Voltage Ambient Temperature C Output VoltageOutput Source Current NormalizedOrdering Information Package DiagramSpeed Ordering Code Package Type OperatingDocument History Sales, Solutions and Legal Information

CY7C138, CY7C139 specifications

The Cypress CY7C139 and CY7C138 are advanced static random-access memory (SRAM) components that have garnered attention in the field of digital electronics due to their high performance and reliability. These SRAMs are designed to meet the demanding needs of a variety of applications, ranging from telecommunications to automotive systems and consumer electronics.

The CY7C139 is a 128K x 8 bit static RAM, while the CY7C138 is a 256K x 8 bit SRAM, offering flexible memory solutions for designers. Both devices utilize a fast access time, typically around 10 to 15 nanoseconds, allowing quick data retrieval essential for high-speed applications. This remarkable speed is complemented by low power consumption, making them suitable for battery-operated devices and other applications where efficiency is paramount.

One of the key features of the CY7C139 and CY7C138 is their asynchronous operation, which enables them to provide high-speed data access without the need for a clock signal. This characteristic simplifies system design and enhances performance, as users can write to and read from the memory without waiting for synchronization. The devices support standard CMOS interface levels, which facilitate integration into a diverse range of digital systems.

Additionally, these SRAMs have been designed with a low standby current, making them particularly effective for low-power applications. The devices also include a robust input/output structure that ensures reliable signal integrity under various operating conditions. Their built-in data retention capability allows the SRAMs to retain stored data even during power failures, a critical feature in many systems that require data preservation.

Both CY7C139 and CY7C138 SRAMs support a wide range of temperature and voltage ranges, making them suitable for industrial and automotive environments. They are packaged in industry-standard configurations, allowing for easy integration into existing designs.

In summary, the Cypress CY7C139 and CY7C138 SRAMs provide high-speed, low-power memory solutions suitable for various applications. Their asynchronous operation, low standby current, and robust performance characteristics make them a preferred choice for engineers looking to enhance system efficiency and reliability. These features make the CY7C139 and CY7C138 indispensable components in modern digital electronic designs.