Cypress CY7C139, CY7C138 manual Maximum Ratings, Operating Range, Range Ambient, Temperature

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CY7C138, CY7C139

Maximum Ratings

 

 

 

 

 

 

 

Output Current into Outputs (LOW)

 

20 mA

Exceeding maximum ratings may impair the useful life of the

 

Static Discharge Voltage

 

 

 

 

>2001V

 

(per MIL-STD-883, Method 3015)

 

 

 

 

 

 

device. These user guidelines are not tested.[5]

 

 

 

 

 

 

 

 

 

 

 

 

Latch-Up Current

 

 

 

 

 

>200 mA

Storage Temperature

–65°C to +150°C

 

 

 

 

 

 

 

Operating Range

 

 

 

 

 

 

 

 

Ambient Temperature with

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Power Applied

–55°C to +125°C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Range

 

Ambient

 

 

VCC

 

 

Supply Voltage to Ground Potential

 

–0.5V to +7.0V

 

 

 

 

 

 

 

 

 

 

 

Temperature

 

 

 

 

DC Voltage Applied to Outputs

 

 

 

 

 

 

 

Commercial

 

0°C to +70°C

 

 

5V ± 10%

 

 

in High Z State

 

–0.5V to +7.0V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Industrial

 

–40°C to +85°C

 

 

5V ± 10%

 

 

DC Input Voltage[6]

 

–0.5V to +7.0V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Electrical Characteristics Over the Operating Range

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

7C138-15

 

7C138-25

 

 

 

Parameter

Description

 

 

 

 

 

Test Conditions

 

7C139-15

 

7C139-25

 

Unit

 

 

 

 

 

 

 

 

 

 

 

 

Min

Max

 

Min

Max

 

 

 

VOH

Output HIGH Voltage

 

VCC = Min., IOH = –4.0 mA

 

 

2.4

 

 

2.4

 

 

V

VOL

Output LOW Voltage

 

VCC = Min., IOL = 4.0 mA

 

 

 

0.4

 

 

 

0.4

 

V

VIH

 

 

 

 

 

 

 

 

 

 

 

2.2

 

 

2.2

 

 

V

VIL

Input LOW Voltage

 

 

 

 

 

 

 

 

 

 

 

0.8

 

 

 

0.8

 

V

IIX

Input Leakage Current

 

GND < VI < VCC

 

 

 

 

–10

+10

 

–10

+10

 

μA

IOZ

Output Leakage Current

 

Output Disabled, GND < VO < VCC

 

–10

+10

 

–10

+10

 

μA

ICC

Operating Current

 

VCC = Max.,

 

 

Commercial

 

 

220

 

 

 

180

 

mA

 

 

 

IOUT = 0 mA,

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Industrial

 

 

 

 

 

 

190

 

 

 

 

 

 

Outputs Disabled

 

 

 

 

 

 

 

 

 

 

 

 

 

ISB1

Standby Current

 

CE

L and

CE

R > VIH,

Commercial

 

 

60

 

 

 

40

 

mA

 

(Both Ports TTL Levels)

 

f = fMAX[7]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Industrial

 

 

 

 

 

 

50

 

 

 

ISB2

Standby Current

 

CE

L and

CE

R > VIH,

Commercial

 

 

130

 

 

 

110

 

mA

 

(One Port TTL Level)

 

f = fMAX[7]

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Industrial

 

 

 

 

 

 

120

 

 

 

ISB3

Standby Current

 

Both Ports

 

 

 

 

Commercial

 

 

15

 

 

 

15

 

mA

 

(Both Ports CMOS Levels)

 

CE and CER > VCC – 0.2V,

 

 

 

 

 

 

 

 

 

 

 

 

 

Industrial

 

 

 

 

 

 

30

 

 

 

 

 

 

VIN > VCC

– 0.2V

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

or VIN < 0.2V, f = 0[7]

 

 

 

 

 

 

 

 

 

 

 

ISB4

Standby Current

 

One Port

 

 

 

 

Commercial

 

 

125

 

 

 

100

 

mA

 

(One Port CMOS Level)

 

CEL or CER > VCC

– 0.2V,

 

 

 

 

 

 

 

 

 

 

 

 

 

Industrial

 

 

 

 

 

 

115

 

 

 

 

 

 

VIN > VCC

– 0.2V or

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VIN < 0.2V, Active

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Port Outputs, f = fMAX[7]

 

 

 

 

 

 

 

 

 

 

 

Notes

5.The Voltage on any input or I/O pin cannot exceed the power pin during power-up.

6.Pulse width < 20 ns.

7.fMAX = 1/tRC = All inputs cycling at f = 1/tRC (except output enable). f = 0 means no address or control lines change. This applies only to inputs at CMOS level standby ISB3.

Document #: 38-06037 Rev. *D

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Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram Functional DescriptionUnit Pin ConfigurationsPin Definitions Left Port Right Port Description Selection Guide DescriptionOperating Range Electrical Characteristics Over the Operating RangeTemperature Maximum RatingsParameter Description Test Conditions Max Unit Capacitance8ALL Input Pulses Switching Characteristics Over the Operating Range9Output GNDData OUT Switching WaveformsTiming BusyData Outl Valid Data OUT Data ValidAddress R Match Data INR Valid Address L MatchAddress Address SEM or CEData Data Valid High ImpedanceWrite Cycle Read Cycle Valid AddressSEM Dataout ValidBusyl Addressr MatchData INR Valid Addressl MatchAddress Match Address Mismatch Address L,R Address Match CEL CER BusyrADDRESSL,R CER CEL Busy L Address L Addressr BusyrRight Side Clears INT R Right Side Sets IntlLeft Side Clears Intl Write Operation ArchitectureNon-Contending Read/Write Inputs Outputs Operation Interrupt Operation Example assumesRight Port Function Normalized Supply Voltage Ambient Temperature C Output VoltageNormalized Supply Current Output Source CurrentPackage Type Operating Package DiagramOrdering Information Speed Ordering CodeDocument History Sales, Solutions and Legal Information

CY7C138, CY7C139 specifications

The Cypress CY7C139 and CY7C138 are advanced static random-access memory (SRAM) components that have garnered attention in the field of digital electronics due to their high performance and reliability. These SRAMs are designed to meet the demanding needs of a variety of applications, ranging from telecommunications to automotive systems and consumer electronics.

The CY7C139 is a 128K x 8 bit static RAM, while the CY7C138 is a 256K x 8 bit SRAM, offering flexible memory solutions for designers. Both devices utilize a fast access time, typically around 10 to 15 nanoseconds, allowing quick data retrieval essential for high-speed applications. This remarkable speed is complemented by low power consumption, making them suitable for battery-operated devices and other applications where efficiency is paramount.

One of the key features of the CY7C139 and CY7C138 is their asynchronous operation, which enables them to provide high-speed data access without the need for a clock signal. This characteristic simplifies system design and enhances performance, as users can write to and read from the memory without waiting for synchronization. The devices support standard CMOS interface levels, which facilitate integration into a diverse range of digital systems.

Additionally, these SRAMs have been designed with a low standby current, making them particularly effective for low-power applications. The devices also include a robust input/output structure that ensures reliable signal integrity under various operating conditions. Their built-in data retention capability allows the SRAMs to retain stored data even during power failures, a critical feature in many systems that require data preservation.

Both CY7C139 and CY7C138 SRAMs support a wide range of temperature and voltage ranges, making them suitable for industrial and automotive environments. They are packaged in industry-standard configurations, allowing for easy integration into existing designs.

In summary, the Cypress CY7C139 and CY7C138 SRAMs provide high-speed, low-power memory solutions suitable for various applications. Their asynchronous operation, low standby current, and robust performance characteristics make them a preferred choice for engineers looking to enhance system efficiency and reliability. These features make the CY7C139 and CY7C138 indispensable components in modern digital electronic designs.