Cypress CY7C145, CY7C144 manual Non-Contending Read/Write Inputs Outputs, Operation

Page 15

CY7C145, CY7C144

Table 3. Non-Contending Read/Write

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Inputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Outputs

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CE

 

 

 

 

 

 

 

 

 

R/W

 

 

 

OE

 

 

SEM

 

 

 

 

 

 

 

 

I/O07/8

 

 

 

 

 

 

 

 

Operation

 

 

 

 

H

 

 

 

 

X

 

X

 

 

 

H

 

 

 

High Z

 

 

 

 

 

Power-Down

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

H

 

 

 

 

H

 

L

 

 

 

L

 

 

 

Data Out

 

 

 

 

 

Read Data in Semaphore

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X

 

 

 

 

X

 

H

 

 

 

X

 

 

 

High Z

 

 

 

 

 

I/O Lines Disabled

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

H

 

 

 

 

 

 

 

 

 

X

 

 

 

L

 

 

 

Data In

 

 

 

 

 

Write to Semaphore

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

L

 

 

 

 

H

 

L

 

 

 

H

 

 

 

Data Out

 

 

 

 

 

Read

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

L

 

 

 

 

L

 

X

 

 

 

H

 

 

 

Data In

 

 

 

 

 

Write

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

L

 

 

 

 

X

 

X

 

 

 

L

 

 

 

 

 

 

 

 

 

 

 

 

 

Illegal Condition

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Table 4. Interrupt Operation Example (assumes

 

 

 

 

L =

 

 

 

R = HIGH)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BUSY

BUSY

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Function

 

 

 

 

 

 

 

 

 

 

 

 

Left Port

 

 

 

 

 

 

 

 

Right Port

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R/W

 

 

CE

 

 

 

OE

 

A012

 

INT

 

R/W

 

 

CE

 

OE

 

A012

 

INT

 

Set Left

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

X

 

X

 

 

 

X

X

 

L

 

L

 

L

 

X

 

1FFE

 

X

 

INT

 

 

 

 

 

 

 

 

 

 

 

 

Reset Left

 

 

 

 

 

 

 

 

 

 

 

 

 

X

 

L

 

 

 

L

1FFE

 

H

 

X

 

L

 

L

 

X

 

X

 

INT

 

 

 

 

 

 

 

 

 

 

 

 

Set Right

 

 

 

 

 

 

 

 

 

 

 

 

 

L

 

L

 

 

 

X

1FFF

 

X

 

X

 

X

 

X

 

X

 

L

 

INT

 

 

 

 

 

 

 

 

 

 

 

 

Reset Right

 

 

 

 

 

 

 

 

 

 

 

X

 

X

 

 

 

X

X

 

X

 

X

 

L

 

L

 

1FFF

 

H

 

INT

 

 

 

 

 

 

 

 

 

 

 

 

Table 5. Semaphore Operation Example

Function

I/O0-7/8Left

I/O0-7/8Right

Status

No action

1

1

Semaphore free

 

 

 

 

Left port writes semaphore

0

1

Left port obtains semaphore

 

 

 

 

Right port writes 0 to semaphore

0

1

Right side is denied access

 

 

 

 

Left port writes 1 to semaphore

1

0

Right port is granted access to semaphore

 

 

 

 

Left port writes 0 to semaphore

1

0

No change. Left port is denied access

 

 

 

 

Right port writes 1 to semaphore

0

1

Left port obtains semaphore

 

 

 

 

Left port writes 1 to semaphore

1

1

No port accessing semaphore address

 

 

 

 

Right port writes 0 to semaphore

1

0

Right port obtains semaphore

 

 

 

 

Right port writes 1 to semaphore

1

1

No port accessing semaphore

 

 

 

 

Left port writes 0 to semaphore

0

1

Left port obtains semaphore

 

 

 

 

Left port writes 1 to semaphore

1

1

No port accessing semaphore

 

 

 

 

Document #: 38-06034 Rev. *D

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Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram Functional DescriptionPin Plcc Top View Pin ConfigurationsPin Definitions Left Port Right Port Description Selection Guide DescriptionUnit Electrical Characteristics Over the Operating Range Maximum RatingsOperating Range Parameter Description Test Conditions Max Unit CapacitanceSwitching Characteristics Over the Operating Range9 7C145-35 7C145-55 Unit Min Switching Characteristics Over the Operating Range7C144-15 7C144-35 7C144-55 Parameter Description 7C145-15Read Cycle No Either Port Address Access15 Switching WaveformsCY7C145, CY7C144 Semaphore Read After Write Timing, Either Side25 Read with Busy M/S=HIGH20 Right Address Valid First CER Valid FirstLeft Side Clears Intl Left Side Sets INT RRight Side Clears INT R Right Side Sets INT LArchitecture Function Left Port Right Port Non-Contending Read/Write Inputs OutputsOperation Interrupt Operation Example assumes = HighTypical DC and AC Characteristics Pin Plastic Leaded Chip Carrier CY7C144-55JXC Ordering Information8K x8 Dual-Port Sram Pin Plastic Leaded Chip Carrier CY7C144-15JXCPin Plastic Leaded Chip Carrier CY7C145-35JXC 8K x9 Dual-Port SramPin Thin Plastic Quad Flat Pack 14 x 14 x 1.4 mm A65 Package DiagramsPin Thin Plastic Quad Flat Pack A80 Sales, Solutions and Legal Information Worldwide Sales and Design Support Products PSoC SolutionsDocument History

CY7C145, CY7C144 specifications

Cypress Semiconductor is renowned for its advanced memory solutions, and two of its noteworthy products are the CY7C144 and CY7C145, both of which serve as emerging leaders in the field of synchronous dynamic random-access memory (SDRAM). These memory chips provide high-speed data access, making them ideal for various applications, including networking, automotive, and industrial electronics.

The CY7C144 is a 4-Mbit SRAM, while its counterpart, the CY7C145, is an 8-Mbit SRAM. Both chips utilize a synchronous interface, which allows them to operate at clock rates that significantly enhance data retrieval speeds. Designed for low power consumption, these devices feature several power-saving modes, making them suitable for battery-operated applications.

One of the main features of the CY7C144 and CY7C145 is their support for burst read and write operations. This function enables the memory to deliver multiple bits of data sequentially with a single command, substantially increasing throughput. Additionally, both models come with a wide data bus, typically 16 bits, allowing for efficient data handling and alignment with a variety of systems.

The technology behind these chips includes static CMOS processes, which promote high performance and reliability under various operating environments. The CY7C144 and CY7C145 both guarantee a high level of data integrity, thanks to advanced error detection and correction features. This makes them especially valuable in applications where data accuracy is critical.

Another critical aspect is the integration of an on-chip address decoder for efficient memory addressing, minimizing delays during data access. This characteristic plays a crucial role in optimizing the overall system performance, particularly in high-bandwidth applications.

In terms of environmental resilience, these memories are designed to withstand a range of temperatures, making them robust enough for industrial applications. The CY7C144 and CY7C145 also comply with several industry standards, ensuring compatibility with a wide array of devices and systems.

In summary, the CY7C144 and CY7C145 by Cypress Semiconductor stand out due to their blend of high speed, low power consumption, and robust reliability. With advanced features like burst read/write capabilities, error detection, and temperature resilience, these memory chips are exceptional choices for modern electronic applications demanding speed and efficiency. Their continued evolution reflects Cypress's commitment to innovation in the semiconductor industry, catering to the growing needs of a data-driven world.