Cypress CY8C24423A, CY8C24223A DC Analog PSoC Block Specifications, DC POR and LVD Specifications

Page 20

CY8C24223A, CY8C24423A

DC Analog PSoC Block Specifications

The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ TA ≤ 125°C. Typical parameters apply to 5V at 25°C and are for design guidance only.

Table 17. DC Analog PSoC Block Specifications

Symbol

Description

Min

Typ

Max

Units

RCT

Resistor Unit Value (Continuous Time)

–

12.24

–

kΩ

CSC

Capacitor Unit Value (Switch Cap)

–

80

–

fF

DC POR and LVD Specifications

The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ TA ≤ 125°C. Typical parameters apply to 5V at 25°C and are for design guidance only.

Note The bits PORLEV and VM in the following table refer to bits in the VLT_CR register. See the PSoC Programmable System-on-Chip Technical Reference Manual for more information on the VLT_CR register.

Table 18. DC POR and LVD Specifications

Symbol

Description

Min

Typ

Max

Units

 

Vdd Value for PPOR Trip (positive ramp)

 

 

 

 

VPPOR2R

PORLEV[1:0] = 10b

 

4.55

4.70

V

 

Vdd Value for PPOR Trip (negative ramp)

 

 

 

 

VPPOR2

PORLEV[1:0] = 10b

 

4.55

 

V

 

PPOR Hysteresis

 

 

 

 

VPH2

PORLEV[1:0] = 10b

–

0

–

mV

 

Vdd Value for LVD Trip

 

 

 

 

VLVD6

VM[2:0] = 110b

4.62

4.73

4.83

V

VLVD7

VM[2:0] = 111b

4.710

4.814

4.950

V

DC Programming Specifications

The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V and -40°C ≤ TA ≤ 125°C. Typical parameters apply to 5V at 25°C and are for design guidance only.

Table 19. DC Programming Specifications

Symbol

Description

Min

Typ

Max

Units

Notes

VddIWRITE

Supply Voltage for Flash Write Operations

4.75

–

–

V

 

IDDP

Supply Current During Programming or Verify

–

10

25

mA

 

VILP

Input Low Voltage During Programming or Verify

–

–

0.8

V

 

VIHP

Input High Voltage During Programming or Verify

2.2

–

–

V

 

IILP

Input Current when Applying Vilp to P1[0] or P1[1] During

–

–

0.2

mA

Driving internal

 

Programming or Verify

 

 

 

 

pull down resistor.

IIHP

Input Current when Applying Vihp to P1[0] or P1[1] During

–

–

1.5

mA

Driving internal

 

Programming or Verify

 

 

 

 

pull down resistor.

VOLV

Output Low Voltage During Programming or Verify

–

–

Vss + 0.75

V

 

VOHV

Output High Voltage During Programming or Verify

3.5

–

Vdd

V

 

FlashENPB

Flash Endurance (per block)a

100

–

–

–

Erase/write

 

 

 

 

 

 

cycles per block.

Flash

Flash Endurance (total)a,b

6,400

–

–

–

Erase/write

ENT

 

 

 

 

 

cycles.

 

 

 

 

 

 

 

 

 

 

 

 

 

Flash

Flash Data Retentionc

15

–

–

Years

 

DR

 

 

 

 

 

 

a.For the full temperature range, the user must employ a temperature sensor user module (FlashTemp) and feed the result to the temperature argument before writ- ing. Refer to the Flash APIs Application Note AN2015 at http://www.cypress.com under Application Notes for more information.

b.A maximum of 64 x 100 block endurance cycles is allowed.

c.Flash data retention based on the use condition of ≤ 7000 hours at TA ≤ 125°C and the remaining time at TA ≤ 65°C.

Document Number: 3-12029 Rev. *E

Page 20 of 31

[+] Feedback

Page 19 Page 21
Image 20
Page 19 Page 21
Contents Cypress Semiconductor Corporation 198 Champion Court FeaturesLogic Block Diagram Digital System PSoC Functional OverviewPSoC Core Analog System Block Diagram Analog SystemPSoC Device Characteristics PSoC Device CharacteristicsGetting Started Additional System ResourcesDevelopment Tools PSoC Designer Software SubsystemsDevice Editor Design BrowserApplication Editor Designing with User ModulesHardware Tools Document Conventions Acronyms UsedUnits of Measure Numeric NamingPin Part Pinout Ssop Type Description Digital Analog Name PinoutsPin Part Pinout Active high external reset with internal pull Pin Part Pinout Ssop Type Description Digi- Ana NameRegister Reference Register ConventionsRegister Mapping Tables Abbreviations UsedName Addr 0,Hex Access Register Map Bank 0 Table User SpaceRegister Map Bank 1 Table Configuration Space Name Addr 1,Hex AccessCY8C24223A, CY8C24423A Electrical Specifications Units of Measure Symbol Unit of MeasureOperating Temperature Absolute Maximum Ratings Symbol Description Min Typ UnitsOperating Temperature Symbol Description Min Typ Max Units Absolute Maximum RatingsDC Electrical Characteristics DC General Purpose IO SpecificationsDC Chip-Level Specifications DC Gpio Specifications Symbol Description Min Typ Max UnitsDC Operational Amplifier Specifications PsrroaPsrrob DC Low Power Comparator SpecificationsDC Analog Output Buffer Specifications Ref Control Power = High DC Analog Reference SpecificationsCT Block Power = High RefHi = Vdd/2 + BandGap DC Programming Specifications DC Analog PSoC Block SpecificationsDC POR and LVD Specifications DC24M AC Electrical CharacteristicsAC Chip-Level Specifications 32K Select EnableGain AC General Purpose IO Specifications AC Gpio Specifications Symbol Description Min Typ Max UnitsAC Operational Amplifier Specifications BwoaAC Low Power Comparator Specifications Typical Agnd Noise with P24 BypassAC Digital Block Specifications CrcprsSpim SpisAC Analog Output Buffer Specifications AC External Clock SpecificationsAC Programming Specifications BwobSCL AC I2C SpecificationsSDA Packaging Information Pin 210-Mil SsopCapacitance on Crystal Pins Solder Reflow Peak TemperatureTypical Package Capacitance on Crystal Pins Thermal ImpedancesOrdering Information Ordering Code DefinitionsSales, Solutions, and Legal Information Worldwide Sales and Design Support Products PSoC SolutionsDocument History Orig. Submission Description of Change Date
Top Page Image Contents